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Description: ALtera FPGA Cyclone III开发电路图,对初学者设计此类FPGA有重要参考价值-ALtera FPGA Cyclone III development of schematics, such FPGA design for beginners have important reference value
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Size: 3165184 |
Author: sky |
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Description: 一个ftp搜索引擎的源代码,正在运行中的校内实用的引擎-source code of a on-line ftp search engine
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Size: 927744 |
Author: 萧雨 |
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Description: Verilog 8051 IP Core for Cyclone -Verilog 8051 IP Core for Cyclone II
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Size: 63488 |
Author: Alx |
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Description: Altera FPGA Cyclone I EP1C6 EP1C12 最小系统 开发板 -the minimum system of Altera FPGA EP1C6 and or EP1C12
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Size: 51200 |
Author: 长官林 |
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Description: Altera FPGA Cyclone II EP2C5 最小系统 开发板-the minimum system of Altera FPGA EP2C5 and or EP2C8
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Size: 588800 |
Author: 长官林 |
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Description: 基于ALTERA CYCLONE 系列的一个USB实验例程-ALTERA CYCLONE series based on a USB experimental routines
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Size: 433152 |
Author: xulinmeng |
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Description: 基于ALTERA CYCLONE 系列的乒乓球游戏实验例程-ALTERA CYCLONE series based on Games Table Tennis experimental routines
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Size: 44032 |
Author: xulinmeng |
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Description: 基于ALTERA CYCLONE 系列的音乐播放示例实验教程.-ALTERA CYCLONE series based on the music player tutorial sample experiment.
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Size: 421888 |
Author: xulinmeng |
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Description: This SPI-mode SD Card controller is a free SOPC Builder component that can be used in any SOPC Builder system. The included example design runs on the Nios II Embedded Evaluation Kit, Cyclone III edition (NEEK).-This SPI-mode SD Card controller is a free SOPC Builder component that can be used in any SOPC Builder system. The included example design runs on the Nios II Embedded Evaluation Kit, Cyclone III edition (NEEK).
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Size: 96256 |
Author: zhangdongqing |
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Description: build a tv box on fpga cyclone 2
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Size: 136192 |
Author: eyals111 |
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Description: 这是一个关于FPGA cyclone 的数据手册。-This is a FPGA cyclone on the data sheet.
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Size: 3330048 |
Author: 许健 |
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Description: 用FPGA cyclone控制AD9280后,将结果用LED的明暗来表示,8位数据分两次显示。-AD9280 control using FPGAcyclone will be the result of the use of LED lighting to show that, in two 8-bit data display.
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Size: 2048 |
Author: 闻闻 |
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Description: 基FPGA Cyclone II_EP2C5 EP2C8的频率计-epga cycklone
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Size: 4096 |
Author: badgvt |
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Description: cyclone ii EP2C8做的BYTEBLASTER ,电路图,PCB图.完美推荐-cyclone ii EP2C8 do BYTEBLASTER, circuit diagrams, PCB Fig. recommend the perfect
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Size: 394240 |
Author: tonghengzhi |
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Description: Altera Cyclone II FPGA Starter Board原理图-Altera Cyclone II FPGA Starter Board Schematic
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Size: 236544 |
Author: 王辉 |
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Description: I2C主机端模块 具有avalon-MT总线接口 可挂载在Altera soc系统之上 使NiosII处理器具备I2C通信能力 模块由Verilog HDL编写 并经Cyclone II FPGA测试-I2C master modul which has a avalon-MT interface that can be attached to Altera SOC system. It provides NiosII I2C communication capability . This module is written with Verilog HDL and has been tested on a Cyclone II FPGA
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Size: 6144 |
Author: magic_andy |
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Description: 时钟同步主要用在产生10NHZ时钟已近IRIG-B-Clock synchronization
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Size: 1173504 |
Author: 孔祥兵 |
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Description: 主流FPGA
Cyclone EP2C5 原理图设计
-Cyclone EP2C5
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Size: 444416 |
Author: 王维 |
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Description: symbian gif动画播放例子-symbian
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Size: 351232 |
Author: cai |
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Description: 基于FPGA的fft实现
摘要:本系统基于Altera Cyclone II 系列FPGA嵌入高性能的嵌入式IP核(Nios)处理器软核,代替传统DSP芯片或高性能单片机,实现了基于FFT的音频信号分析。-FPGA-based realization of the fft Abstract: This system is based on Altera Cyclone II family of embedded high-performance FPGA embedded IP core (Nios) soft-core processor, chip or replace the traditional high-performance single-chip DSP to realize the audio signals based on FFT analysis .
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Size: 32768 |
Author: xiang |
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