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[VHDL-FPGA-Verilog] I2C_cyclone 1

Description: I2C interface on cyclone 1 epc1
Platform: | Size: 2947072 | Author: igor5451 | Hits:

[VHDL-FPGA-Verilog] A4_Clock

Description: 基于Altera的Cyclone4的时钟程序(clock program based on Cyclone4 of Altera)
Platform: | Size: 3533824 | Author: DSP新手 | Hits:

[VHDL-FPGA-Verilog] alu

Description: Code to synthesize Arithmetic Logic Unit
Platform: | Size: 116736 | Author: Immanuel | Hits:

[VHDL-FPGA-Verilog] LED_test

Description: Altera Cyclne IV example for Quartus
Platform: | Size: 3096576 | Author: TreyWilliams | Hits:

[VHDL-FPGA-Verilog] C4E6-K SCHv2

Description: Altera board shhematics
Platform: | Size: 78848 | Author: TreyWilliams | Hits:

[VHDL-FPGA-Verilog] 1_2

Description: 基于cyclone EP1C6Q240C8的流水灯设计样本(a sample design of light water based on cyclone EP1C6Q240C8)
Platform: | Size: 404480 | Author: dark dragon | Hits:

[VHDL-FPGA-Verilog] elevator

Description: 八层电梯，有密码开关，警报开关，quartusⅡ综合，cycloneⅤ的板子(There are password switches, alarm switches, and eight layers of elevator display, Quartus II synthesis, cyclone V board.)
Platform: | Size: 3072 | Author: 满树榆钱儿 | Hits:

[Embeded-SCM Develop] NIOS-II常用函数详解

Description: Nios II系列软核处理器是Altera的第二代FPGA嵌入式处理器，其性能超过200DMIPS，。Altera的Stratix 、Stratix GX、 Stratix II和 Cyclone系列FPGA全面支持Nios II处理器，以后推出的FPGA器件也将支持Nios II。(The Nios II family of soft core processors is the second generation of Altera's FPGA embedded processor that provides support for Altera's Stratix, Stratix GX, Stratix II, and Cyclone FPGA families that exceed 200DMIPS in performance.)
Platform: | Size: 74752 | Author: 彩云之南7 | Hits:

[VHDL-FPGA-Verilog] 04_uart_test

Description: 基于FPGA的串口通信实验，用的是黑金板子CYCLONE IV(FPGA UART test code,simple and easy to study,good)
Platform: | Size: 3529728 | Author: 年轻的国王 | Hits:

[Graph program] text seven

Description: VGA彩条信号显示器设计 设计并调试好一个VGA彩条信号发生器，并用EDA实验开发系统（拟采用的实验芯片的型号可选Altera CycloneII系列的 EP2C5T144C8 FPGA。(A VGA color bar signal generator is designed and debugged, and an EDA experimental development system is used (the model of the experimental chip to be used can be selected as EP2C5T144C8 FPGA of Altera Cyclone II series).)
Platform: | Size: 772096 | Author: 一一11. | Hits:

[VHDL-FPGA-Verilog] NIOS Ethernet (enc28j60 chip)

Description: Implemented NIOS2 processor on SOPC Quartus 11.1, using internal Cyclone memory (on chip 32 kB) The software allows you to remotely access the web page. http://192.168.0.100/888 you can poke into the center through the Nios console there will be a reaction of +1 PING works.
Platform: | Size: 125284 | Author: hemamont@mail.ru | Hits:
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