Welcome！[Sign In] ！[Sign Up]！
Front-page it | Collect it | [中国-简体中文]
FAQ Fav
Location:
Search - DE2

Search list

[VHDL-FPGA-Verilog] altera_sdram

Description: Simple SDRAM controller source code for Altera DE2 board
Platform: | Size: 7168 | Author: leblebitozu | Hits:

[VHDL-FPGA-Verilog] DE2_NIOS_Lite_12_flash

Description: 实现如何在Nios II对Flash进行读写 [SOPC、Nios II、DE2] -Introduce how to read and write the Flash using Nios II[SOPC、Nios II、DE2]
Platform: | Size: 1096704 | Author: bobgeng | Hits:

[SCM] DE2_pin_assignments

Description: altera DE2开发板的管脚配置文件很好用的哦-altera DE2 development board of the pin configuration files used by Oh well
Platform: | Size: 2048 | Author: chxinrui | Hits:

[Windows Develop] hex_7seg

Description: altera DE2开发板上数码管译码的verilog程序-altera DE2 development board Verilog digital tube decoding procedures
Platform: | Size: 2048 | Author: chxinrui | Hits:

[VHDL-FPGA-Verilog] DE2_SD_Card_Audio

Description: DE2上SD卡的读写代码，应用环境quartus -DE2 on SD card to read and write code
Platform: | Size: 12817408 | Author: 向亚飞 | Hits:

[VHDL-FPGA-Verilog] DE2_schematics

Description: Altera FPGA DE2的原理图,相信有很大的帮助,经典的FPGA设计电路及相关的接口都有了。-Altera FPGA DE2 the schematic diagram, I believe there is a great help, classic design FPGA circuits and related interfaces have.
Platform: | Size: 389120 | Author: skytech | Hits:

[VHDL-FPGA-Verilog] counter

Description: 一个用数码管自动计数的verilog程序，DE2开发板实现-An automatic digital control procedures verilog count, DE2 development board implementation
Platform: | Size: 1024 | Author: 张磊 | Hits:

[SCM] 16bit_display8bitLED

Description: Abstract七段显示器在DE2可当成Verilog的console，做为16进位的输出结果。Introduction使用环境：Quartus II 7.2 SP1 + DE2(Cyclone II EP2C35F627C6)简单的使用switch当成2进位输入，并用8位数的七段显示器显示16进位的结果。-Abstract Seven-Segment Display as Verilog to DE2 at the console, as 16 of the output binary. Introduction to use the environment: Quartus II 7.2 SP1+ DE2 (Cyclone II EP2C35F627C6) the use of a simple switch as a binary input 2, and paragraph 8-digit binary display 16 results.
Platform: | Size: 7168 | Author: 王媛媛 | Hits:

[VHDL-FPGA-Verilog] DE2_LCM_TV_NTSC

Description: DE2 S O P C 用硬件语言 描述地 开发板上测试 CLM模块 实现视频传输-DE2 SOPC LCM
Platform: | Size: 228352 | Author: ZHAO | Hits:

[VHDL-FPGA-Verilog] tut_DE2_sdram_vhdl

Description: This tutorial explains how the SDRAM chip on ltera’s DE2 Development and Education board can be used with a Nios II system implemented by using the Altera SOPC Builder.
Platform: | Size: 546816 | Author: *Roma* | Hits:

[VHDL-FPGA-Verilog] tut_embedded_programming_verilog_C_DE2

Description: This tutorial explains how to communicate with IO devices on the DE2 Board and how to deal with interrupts using C and the Altera Monitor Program. Two example programs are given that diplay the state of the toggle switches on the red LEDs. The fi rst program uses the programmed I/O approach and the second program uses interrupts.-This tutorial explains how to communicate with IO devices on the DE2 Board and how to deal with interrupts using C and the Altera Monitor Program. Two example programs are given that diplay the state of the toggle switches on the red LEDs. The fi rst program uses the programmed I/O approach and the second program uses interrupts.
Platform: | Size: 166912 | Author: *Roma* | Hits:

[Software Engineering] Trafficlightscontroller

Description: 1， 实验题目，和实验基本要求 • • • • • • • • • • • • • • • • • • • • 2， Quartus Ⅱ的运行环境及DE2实验板简介• • • • • • 3， 电路图和线路图，电路工作原理，系统框图• • • • • • • 4， 操作过程 ：建工程、编译、仿真 、下载运行• • • • • 5， 收获及心得体会，主要遇到的问题及解决过程• • • • • -1, the experimental subject, and the basic requirements of the experiment • • • • • • • • • • • • • • • • • • • • 2, Quartus Ⅱ operating environment and DE2 board Introduction • • • • • • 3, circuit diagram and the circuit diagram, working principle of the circuit, the system block diagram • • • • • • • 4, the operation process: building works, the compiler, simulation, download operation • • • • • 5, harvest and experiences, the main problems encountered and solutions Process • • • • •
Platform: | Size: 1163264 | Author: 李东林 | Hits:

[VHDL-FPGA-Verilog] Alarm

Description: 用verilog HDL 写的时钟程序，在DE2上实现了。-Alarm program based on Verilog HDL, run on DE2 Board
Platform: | Size: 141312 | Author: 张智 | Hits:

[VHDL-FPGA-Verilog] DE2_demonstrations

Description: DE2开发板上的资料,主要是他的例子,含有各种接口程序,如VGA,USB,LCD等-DE2 development board information, mainly his example, contain a variety of interface program, such as VGA, USB, LCD, etc.
Platform: | Size: 44079104 | Author: 翁文天 | Hits:

[VHDL-FPGA-Verilog] SEG7_LUT_8_0

Description: DE2开发平台7段显示VHDL代码，自己针对vilorg翻译成VHDL代码-DE2 Development Platform 7 show the VHDL code for vilorg translated into their own VHDL code
Platform: | Size: 1024 | Author: siubr | Hits:

[Linux-Unix] drivers

Description: Altera DE2开发板的LED、LCD、SEG7和按键的linux下的设备驱动程序-It is about the drivers of LED、LCD、SEG7 and keysbase on Altera DE2 Developboard！
Platform: | Size: 45056 | Author: lijun | Hits:

[SCM] DE2

Description: ED2开发板功能和结构简介,如何使用ED2开发板-ED2 Development Board Introduction
Platform: | Size: 46651392 | Author: 汪扬 | Hits:

[SCM] PWM

Description: 自己编写的PWM模块，通过SOPC和NIOSII IDE软件控制，控制DE2开发板上的小灯忽明忽暗-I have written the PWM module, through the SOPC and NIOSII IDE software control, control DE2 development board忽明忽暗small lamp
Platform: | Size: 8068096 | Author: hebei | Hits:

[VHDL-FPGA-Verilog] Datasheets

Description: de2板的相关硬件的芯片资料，详细的介绍了de2板上各主要芯片的详细资料-de2 board chip hardware related information described in detail the main chip board de2 details
Platform: | Size: 9592832 | Author: 夏英杰 | Hits:

[VHDL-FPGA-Verilog] DE2_NIOS_CharLCD

Description: nios ii在DE2上实现LCD动态显示，运行成功-nios ii in DE2 to achieve LCD dynamic display, running a successful
Platform: | Size: 18535424 | Author: amy | Hits:
« 1 2 3 4 5 6 78 9 10 11 12 ... 50 »

CodeBus www.codebus.net