DE2_demonstrations DE2 development board informati

Title: DE2_demonstrations

Category:
VHDL-FPGA-Verilog
Tags:
[C/C++] [源码]
File Size:
42.04mb
Update:
2012-11-26
Downloads:
0 Times
Uploaded by:
wengwentian1

Description: DE2 development board information, mainly his example, contain a variety of interface program, such as VGA, USB, LCD, etc.

Downloaders recently: [More information of uploader wengwentian1]

To Search: de2 DE2-70 VHDL LCD usb de2 vhdl vhdl DE2 vhdl usb vhdl de2 lcd DE2_demonstrations

[MedianFilter33] - 3* 3 filtering to achieve the verilog co
[FPGA_27eg] - FPGA value of the 27 examples. Rar inclu
[DE2_TV] - DE2 platform in television set-top box e
[VGA] - VGA
[vga_vhdl] - FPGA realize for a good vga display rout
[saa7113] - saa7113 configuration, verilog language
[ss] - DE2 development board sopc the developme
[DE2_SD_Card_Audio] - de2_sd_card
[AT91SAM9261-EK_Rev_D] - ATSAM9261 evaluation board schematics, o
[rpds_software] - HELLO WORLD

File list (Check if you may need any files):

DE2_demonstrations
..................\DE2_Default
..................\...........\AUDIO_DAC.v
..................\...........\DE2_Default.pof
..................\...........\DE2_Default.qpf
..................\...........\DE2_Default.qsf
..................\...........\DE2_Default.sof
..................\...........\DE2_Default.v
..................\...........\DE2_Default_assignment_defaults.qdf
..................\...........\I2C_AV_Config.v
..................\...........\I2C_Controller.v
..................\...........\Img_DATA.hex
..................\...........\LCD_Controller.v
..................\...........\LCD_TEST.v
..................\...........\README.txt
..................\...........\Reset_Delay.v
..................\...........\SEG7_LUT.v
..................\...........\SEG7_LUT_8.v
..................\...........\VGA_Audio_PLL.v
..................\...........\VGA_Controller
..................\...........\..............\Img_DATA.hex
..................\...........\..............\Img_RAM.v
..................\...........\..............\VGA_Controller.v
..................\...........\..............\VGA_OSD_RAM.v
..................\...........\..............\VGA_Param.h
..................\DE2_i2sound
..................\...........\CLOCK_500.bsf
..................\...........\CLOCK_500.v
..................\...........\DE2_i2sound.bdf
..................\...........\DE2_i2sound.pof
..................\...........\DE2_i2sound.qpf
..................\...........\DE2_i2sound.qsf
..................\...........\DE2_i2sound.sof
..................\...........\DE2_i2sound_assignment_defaults.qdf
..................\...........\i2c.bsf
..................\...........\i2c.v
..................\...........\keytr.bsf
..................\...........\keytr.v
..................\...........\README.txt
..................\DE2_NET
..................\.......\altpllpll_0.ppf
..................\.......\Audio_0.v
..................\.......\Audio_DAC_FIFO
..................\.......\..............\cb_generator.pl
..................\.......\..............\class.ptf
..................\.......\..............\hdl
..................\.......\..............\...\AUDIO_DAC_FIFO.v
..................\.......\..............\...\FIFO_16_256.v
..................\.......\AUDIO_DAC_FIFO.v
..................\.......\Audio_PLL.ppf
..................\.......\Audio_PLL.v
..................\.......\bht_ram.mif
..................\.......\Binary_VGA_Controller
..................\.......\.....................\cb_generator.pl
..................\.......\.....................\class.ptf
..................\.......\.....................\hdl
..................\.......\.....................\...\Img_DATA.hex
..................\.......\.....................\...\Img_RAM.v
..................\.......\.....................\...\VGA_Controller.v
..................\.......\.....................\...\VGA_NIOS_CTRL.v
..................\.......\.....................\...\VGA_OSD_RAM.v
..................\.......\.....................\...\VGA_Param.h
..................\.......\.....................\inc
..................\.......\.....................\...\VGA.c
..................\.......\.....................\...\VGA.h
..................\.......\button_pio.v
..................\.......\clock_0.v
..................\.......\clock_1.v
..................\.......\cpu_0.ocp
..................\.......\cpu_0.v
..................\.......\cpu_0.vo
..................\.......\cpu_0_bht_ram.mif
..................\.......\cpu_0_dc_tag_ram.mif
..................\.......\cpu_0_ic_tag_ram.mif
..................\.......\cpu_0_jtag_debug_module.v
..................\.......\cpu_0_jtag_debug_module_wrapper.v
..................\.......\cpu_0_mult_cell.v
..................\.......\cpu_0_ociram_default_contents.mif
..................\.......\cpu_0_rf_ram_a.mif
..................\.......\cpu_0_rf_ram_b.mif
..................\.......\cpu_0_test_bench.v
..................\.......\dc_tag_ram.mif
..................\.......\DE2_Board
..................\.......\.........\class.ptf
..................\.......\.........\system
..............

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