Search - DE2 - CodeBus

[Driver Develop] ISP1362_IF

Description: 基于DE2平台的程序开发，完成对ISP总线的初始化设置-Based on the DE2 platform application development, completion of ISP bus initialization Settings
Platform: | Size: 1024 | Author: 安昭旭 | Hits:

[Driver Develop] VGA_Controller

Description: 基于DE2平台的程序开发，完成对VGA控制的初始化设置-Based on DE2 platform application development, completes initialization of VGA control Settings
Platform: | Size: 1024 | Author: 安昭旭 | Hits:

[Driver Develop] VGA_NIOS_CTRL

Description: 基于DE2平台的程序开发，完成对VGA与nios连接的初始化设置-Based on DE2 platform application development, complete the VGA connects to nios initialization Settings
Platform: | Size: 1024 | Author: 安昭旭 | Hits:

[Picture Viewer] Columbia-University-on-VGA-video

Description: vga的现实原理与实际应用，基于DE2 FPGA开发板的应用，很透彻，很贴切，很有参考价值-vga reality principle and practical application, based on the application of the DE2 FPGA development board, very thorough, very appropriate, great reference value
Platform: | Size: 382976 | Author: wangxing | Hits:

[VHDL-FPGA-Verilog] uart_lcd

Description: 基于FPGA的UART通信，并用LCD(1602)显示通讯状态和通讯的数据。通过在ALTERA公司生产的DE2-115开发板上运行，证明此程序稳定可靠。时钟为50MHz，语言为VHDL,状态机。-FPGA-based UART communication, and LCD (1602) show the communication status and data communications. DE2-115 development board by ALTERA Company production run, prove that the program is stable and reliable. The clock is 50MHz, language VHDL, state machines.
Platform: | Size: 6435840 | Author: jiazhaorong | Hits:

[VHDL-FPGA-Verilog] DE2_115_Audio

Description: DE2-115开发板音频录放verilog HDL代码-DE2-115 development board audio recorders verilog HDL code
Platform: | Size: 1906688 | Author: 张海军 | Hits:

[VHDL-FPGA-Verilog] DE2_115_NIOS_DEVICE_LED

Description: DE2-115开发板的LED灯设计 Verilog HDL语言编写-DE2-115 development board LED lamp design Verilog HDL language
Platform: | Size: 4140032 | Author: 张海军 | Hits:

[VHDL-FPGA-Verilog] DE2_115_NIOS_HOST_MOUSE_VGA

Description: DE2-115开发板的verilog HDL的VGA设计-DE2-115 development board VGA verilog HDL design
Platform: | Size: 4288512 | Author: 张海军 | Hits:

[VHDL-FPGA-Verilog] DE2_115_PS2_DEMO

Description: DE2-115开发板的PS2的Verilog HDL语言设计-The DE2-115 development board of the PS2 Verilog HDL language design
Platform: | Size: 91136 | Author: 张海军 | Hits:

[Linux driver] swDriver

Description: Altera DE2 Switches Kernel Module Driver
Platform: | Size: 2048 | Author: MM | Hits:

[VHDL-FPGA-Verilog] sy4

Description: 本程序用在DE2开发板上实现一个弹球的小游戏可以在在显示评上显示一个圆球和一个方球；两者在屏幕上自由运动可以通过按键来调节两者的水平方向和垂直方向的速度大小也能调节两个小球的大小和颜色也可以实现调节屏幕的大小和颜色-The procedures used in the DE2 development board to achieve a pinball game in both freedom of movement on the screen by pressing a button to adjust both the horizontal and vertical direction in the commentary on a sphere and a square ball the speed size can regulate two small balls the size and color can also adjust the screen size and color
Platform: | Size: 1617920 | Author: 高金兴 | Hits:

[Other] clock

Description: 数字时钟led显示，de2开发板，HEX显示分秒-digital clock
Platform: | Size: 2048 | Author: 强书连 | Hits:

« 1 2 ... 45 46 47 48 49 50»

Category

Source Code

Web/Internet

Develop Tools

Document

Other

Search in results

OS

Platform

Language

File Type

Search list

[Driver Develop] ISP1362_IF

[Driver Develop] VGA_Controller

[Driver Develop] VGA_NIOS_CTRL

[Picture Viewer] Columbia-University-on-VGA-video

[VHDL-FPGA-Verilog] uart_lcd

[VHDL-FPGA-Verilog] DE2_115_Audio

[VHDL-FPGA-Verilog] DE2_115_NIOS_DEVICE_LED

[VHDL-FPGA-Verilog] DE2_115_NIOS_HOST_MOUSE_VGA

[VHDL-FPGA-Verilog] DE2_115_PS2_DEMO

[Linux driver] swDriver

[VHDL-FPGA-Verilog] sy4

[VHDL-FPGA-Verilog] SDRAM

[VHDL-FPGA-Verilog] Lab1

[Other Embeded program] file_system_test

[VHDL-FPGA-Verilog] ccd_vga_de2

[VHDL-FPGA-Verilog] DE2_NIOS_HOST_MOUSE_VGA

[Other Embeded program] Character_LCD

[Other Embeded program] arm_VGA4

[VHDL-FPGA-Verilog] Nios2

[Other] clock

CodeBus www.codebus.net