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[Embeded-SCM Develop] verilog.HDL.examples DL : 0: 许多非常有用的 Verilog 实例: ADC, FIFO, ADDER, MULTIPLIER 等-many very useful Verilog examples : ADC, FIFO, ADDER, MULTIPLIER etc.
Date : 2008-10-13 Size : 183.86kb User : 张驰
[Embeded-SCM Develop] MULT8X8F DL : 0: 8x8 Software Multiplier in PIC5X
Date : 2008-10-13 Size : 1.19kb User : zwj
[Embeded-SCM Develop] radix4_multiplier DL : 1: 54x54-bit Radix-4 Multiplier based on Modified Booth Algorithm
Date : 2008-10-13 Size : 733.56kb User : 汤江逊
[Embeded-SCM Develop] MULT8X8F DL : 0: 8x8 Software Multiplier in PIC5X
Date : 2025-12-16 Size : 1kb User : zwj
[Embeded-SCM Develop] 16bit_booth_multiplier_STG DL : 0: verilog程序，实现两个16bit数乘法，采用booth算法，基于状态机实现，分层次为datapath和controller两个子模块，testBench测试通过-verilog procedures, two 16bit multiplication, the algorithm used booth. Based on the state machine achieved at different levels for datapath controller and two sub-modules, testBench the test
Date : 2025-12-16 Size : 2kb User :
[Embeded-SCM Develop] verilog.HDL.examples DL : 0: 许多非常有用的 Verilog 实例: ADC, FIFO, ADDER, MULTIPLIER 等-many very useful Verilog examples : ADC, FIFO, ADDER, MULTIPLIER etc.
Date : 2025-12-16 Size : 184kb User : 张驰
[Embeded-SCM Develop] expt91_multi8x8 DL : 0: 基于fpga和sopc的用VHDL语言编写的EDA移位相加硬件乘法器-FPGA and SOPC based on the use of VHDL language shift EDA add hardware multiplier
Date : 2025-12-16 Size : 35kb User : 多幅撒
[Embeded-SCM Develop] S3C44B0X-test DL : 0: s3c44b0 的开发板测试的所有源代码及程序！！！汇编代码主要完成系统初始化，包括：禁止看门狗；禁止所有中断；初始化存储器（包括SDRAM）；设定锁相环倍频；使能所有单元模块时钟；初始化堆栈；设置中断等等 C语言代码主要是应用代码，包括：设置使用指令缓存；修改系统主时钟为32MHz； IO端口功能、方向设定；初始化中断；初始化DMF50081液晶模块；蜂鸣器测试；液晶显示测试； LED输出测试；定时器、PWM测试等；-S3C44B0 development board to test all source code and procedures! ! ! Assembly code to initialize the main complete system, including: the prohibition of watchdog ban all interrupted initialize memory (including SDRAM) set PLL multiplier so that all clock modules initialize stack settings interruption, etc. C language code is application code, including: the use of instruction cache settings modify the system master clock is 32MHz IO port functions, the direction of settings initialization interrupt DMF50081 LCD module initialization buzzer test LCD test LED output test timer, PWM testing
Date : 2025-12-16 Size : 4kb User : 叶凌
[Embeded-SCM Develop] Signed32MultiplierV101 DL : 0: 32位元2進位SIGNED乘法器32位元SIGNED乘法器-32-bit 2 binary SIGNED Multiplier Multiplier 32-bit SIGNED
Date : 2025-12-16 Size : 2kb User : chen
[Embeded-SCM Develop] radix4_multiplier DL : 0: 54x54-bit Radix-4 Multiplier based on Modified Booth Algorithm
Date : 2025-12-16 Size : 733kb User : 汤江逊
[Embeded-SCM Develop] fft DL : 1: 2007年全国大学生电子设计大赛，A题音频信号分析仪的全部源程序。单片机为c8051f120，系统时钟倍频至96MHZ。 main.c是一个包含五级菜单的主函数。 FFT.C是进行fft变换，将时域信号变换成频域信号。 flash.c是读写片外flash存储器的程序,可以将分析结果保存,以备调用. z7290.c是周立功7290键盘芯片的驱动程序. FFT_xgjis.c是对变换后的频谱进行分析和运算. FFT_CodeTable.c是一个正弦表,在FFT的时候调用. LCD320240.c是320*240的液晶驱动程序,液晶的控制器是SED1335. 所有的.h文件提供了子函数的定义. 本程序用KEIL3 802版本编译通过，将所有的.C文件添加到工程中，并编译main.c 注意两点:1.器件选择c8051f120. 2.在target中将时钟设为96M.同时必须将Memory Model 改成large--XDATA.默认的是small. 因为本设计占用的资源是非常大的. Program Size: data=81.3 xdata=6811 code=43056-2007 National Undergraduate Electronic Design Contest, A title of the audio signal analyzer full source code. Singlechip c8051f120, system clock multiplier to 96MHZ. main.c is a menu that contains the main function 5. FFT.C is fft transform, time-domain signal will be converted into frequency domain signals. flash.c are reading and writing flash memory chip procedure, the results of the analysis can be preserved, for calling. z7290.c weeks are Ligong 7290 driver keyboard chip. FFT_xgjis.c is transformed spectrum analysis and computing. Sine FFT_CodeTable.c is a table at a time when FFT calls. LCD320240.c are 320* 240 LCD drivers, LCD controllers are SED1335. all. h document provides the definition of Functions.
Date : 2025-12-16 Size : 35kb User : 王渔阳
[Embeded-SCM Develop] Protel DL : 0: 内含常用原理图的封装及PCB的封装.对于您能起到事半功倍的效果-Includes schematic diagram commonly used packaging and PCB assembly. You can play for a multiplier effect!!!
Date : 2025-12-16 Size : 164kb User : mr tao
[Embeded-SCM Develop] BoothMultiplier4 DL : 0: Radix 4 Booth Multiplier
Date : 2025-12-16 Size : 197kb User : photo26
[Embeded-SCM Develop] MSP-TEST44X-Practice-code DL : 0: MSP-TEST44X 学习板光盘资料及实验说明本学习板是按照教育大纲，采纳国内外许多单片机实验仪的优点,保持了传统机的实验项目，增加了以实用技术为主的许多实验。实验内容涉及到端口，时钟，FLASH 读写，看门狗，硬件乘法器，TIMER_A_操作，TIMER_A ，ADC&bt&lcd，通讯操作（232，485， SPI），键盘操作(独立按键,行列按键)，LED 显示，LCD 点阵操作，扩展 DATA FLASH 操作， EEPROM 共 14 个例程，采用 C 和汇编两种语言形式。学习版硬件平台以 MSP430F449 为核心，使用了 MSP430F449 内部的绝大多数资源，配合 FET 仿真调试&编程工具，可方便的实现开发，在线调试与编程下载。为了便于大家查找学习板的资料及便捷的观看实验指导书，特作此说明。-MSP-TEST44X board CD-ROM learning materials and experiments The learning board in accordance with the educational programs, both at home and abroad to adopt many of the advantages of single-chip experiment to maintain the tradition of experimental aircraft Projects, increased to a number of practical technology-based experiments. Experiments related to the ports, clock, FLASH to read and write and see Dog doors, hardware multiplier, TIMER_A_ operation, TIMER_A, ADC & bt & lcd, communications operations (232,485, SPI), keyboard operation (independent keys, the ranks of keys), LED display, LCD dot-matrix operations, the expansion of DATA FLASH operation A total of 14 routines EEPROM using C and compile the form of two languages. Learning version of the hardware platform for the nuclear MSP430F449 Heart, using the MSP430F449 the vast majority of internal resources and the co-FET simulation debugging & programming tools to facilitate the The realization of the development, de
Date : 2025-12-16 Size : 107kb User : zozo
[Embeded-SCM Develop] 16_bit DL : 0: 采用boot算法的16位乘法器,速度较快，可以试下哈-Boot algorithm using 16-bit multiplier, faster, you can try under the Kazakhstan
Date : 2025-12-16 Size : 5kb User : aaa
[Embeded-SCM Develop] test_bench DL : 0: test bench for booth multiplier
Date : 2025-12-16 Size : 1kb User : judy
[Embeded-SCM Develop] wallacetreemultiplier DL : 0: wallace tree multiplier n bit c program
Date : 2025-12-16 Size : 8kb User : sneha
[Embeded-SCM Develop] wallace_tree_multiplier_part1 DL : 0: wallace tree multiplier
Date : 2025-12-16 Size : 177kb User : sneha
[Embeded-SCM Develop] 32bit-sequential-multiplier--realization DL : 0: 32bit sequential multiplier realization-32bit sequential multiplier realization
Date : 2025-12-16 Size : 11kb User : sharath
[Embeded-SCM Develop] 16bit-multiplier DL : 0: 实现verilog16位乘法器，verilog新手(achieve 16-bit multiplier)
Date : 2025-12-16 Size : 1kb User : 风20171201

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