interleaver the verilog code for the interleave en - CodeBus

Welcome！[Sign In] ！[Sign Up]！

Front-page it | Collect it | [中国-简体中文]

FAQ Fav

Location:

Embeded-SCM Develop

VHDL-FPGA-Verilog

Title: interleaver

Category:
VHDL-FPGA-Verilog
Tags:
[VHDL] [源码]
File Size:
63kb
Update:
2012-11-26
Downloads:
0 Times
Uploaded by:
vilafinal

Description: the verilog code for the interleave encoder, with the testbench code and waveform screen print.

Downloaders recently: [More information of uploader vilafinal]

To Search: interleaver

[interleave] - -Verilog code for interleave.
[jiaozhiqi_fpga] - CDMA2000 system for the realization of a
[interleave] - Data interleaver verilog HDL source file
[interleaver-vhdl] - 4-8 prepared VHDL code interleaver
[interleaver] - The data communication system procedures
[interleaver] - This is a convolutional interleaver code
[interleaver] - WLAN FEC interleaver for Encoder i=(Ncbp
[pn_generator] - FPGA realization of pn generator, Verilo
[Interleaver] - Do their own interleaver, which contains

File list (Check if you may need any files):

interleaver_for_ly\interleaver_4_4.v
..................\test.v
..................\wave.bmp
interleaver_for_ly

CodeBus www.codebus.net

“CodeBus” is the largest source code store in internet!

1999-2018 CodeBus All Rights Reserved.