VHDL-FPGA-Verilog List Page 652

VHDL-FPGA-Verilog list

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tx_buffer_inband Downloaded：0: tx buffer inband VHDL
Date : 2025-06-26 Size : 2kb User : zhou tao
Verilog135 Downloaded：0: VERILOG Practical cases, about 135, particularly useful for beginners
Date : 2025-06-26 Size : 25kb User : yubo
counter Downloaded：0: 100MHZ clock signal through a divider to get 1HZ signal, and then input to the three counters, the output of the counter displayed on the corresponding LED lights on the FPGA. The program consists of four main parts: the
Date : 2025-06-26 Size : 1kb User : asong
simple_CPU_VHDL Downloaded：0: -Simple CPU design of the VHDL code and VHDL design process cpu
Date : 2025-06-26 Size : 2.42mb User : woshi
DAC1220 Downloaded：1: High-precision DC source, DAC1220,20 bit resolution, bipolar output
Date : 2025-06-26 Size : 321kb User : 慕容麒脩
Verilog-Code-Receiver Downloaded：0: Verilog Code for Receiver USART
Date : 2025-06-26 Size : 1kb User : Tushar
Verilog-Code-Transmitter Downloaded：0: Verilog Code for Transmitter USART
Date : 2025-06-26 Size : 1kb User : Tushar
38-always Downloaded：0: This program uses the always statement to realize 3-8 decoder function, simulation waveform is right.
Date : 2025-06-26 Size : 119kb User : Dr.Shang
3-8-assign Downloaded：0: This program uses the assign statement to realize 3-8 decoder function, simulation waveform is right.
Date : 2025-06-26 Size : 127kb User : Dr.Shang
cordic16 Downloaded：0: the 16 bits cordic codes in VHDL
Date : 2025-06-26 Size : 1kb User : 郭凯丰
FFT_2048 Downloaded：0: The FPGA 2048 points FFT algorithm
Date : 2025-06-26 Size : 5.16mb User : xie qiongfei
asyn_fifo Downloaded：0: asyn_fifo include detailed instruction，Synchronous FIFO for TPRAM
Date : 2025-06-26 Size : 380kb User : 杨莉莉

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