VHDL-FPGA-Verilog List Page 649

VHDL-FPGA-Verilog list

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daima Downloaded：0: Rst is an active-low system reset signal, Clk is a clock signal. AB [5: 0] is the address signal, DB [7: 0] is the data signal, wr write signal is active low. start is the start signal. Module in a dual port memory of 64
Date : 2025-06-26 Size : 175kb User : 静水沉沙
OV7670_VGA Downloaded：0: Using OV7670 camera video data sampled by FPGA DE2 development board with a VGA display on the screen.
Date : 2025-06-26 Size : 924kb User : jack chen
8bitsprocessor Downloaded：0: Design and Simulation of 8-bit RISC microprocessors, reduced instruction set
Date : 2025-06-26 Size : 1.74mb User : Bonnie
barrel-shifter-verilog Downloaded：0: this code is used for implementation of barrel shifter using verilog language
Date : 2025-06-26 Size : 2kb User : appolo
pararel-8-bit-adder-verilog Downloaded：0: implementation of 8bit adder with pararel computation. It s use S/P converter and P/S converter. The code is written in verilog language
Date : 2025-06-26 Size : 1kb User : appolo
serial-cordic-verilog Downloaded：0: implementation of cordic algorithm for many aplication like cos, sinus, polar to rectangular conversion and rectangular to polar conversion. It s written in verilog language and testbench is included
Date : 2025-06-26 Size : 3kb User : appolo
DDS Downloaded：0: Digital synthesizer (DDS) based on FPGA, using VHDL language, to achieve sine wave, triangle wave, square wave, sawtooth waveform generation four. Tip: The last output module is a serial DA, may change depending on the d
Date : 2025-06-26 Size : 2.67mb User : 康二栋
CORDIC_IP Downloaded：0: Based on CORDIC achieve sinusoidal signal simulation by using built-in IP core CORDIC can achieve sinusoidal signal.
Date : 2025-06-26 Size : 5.66mb User : 康二栋
VGA Downloaded：0: VGA display board and a stripe pattern. Through experiments panel button switch, enabling graphics switching VGA for beginners.
Date : 2025-06-26 Size : 633kb User : 康二栋
yinyue Downloaded：0: Music player, play a nice Butterfly Lovers , so that we learn of the player in the production of a good mood.
Date : 2025-06-26 Size : 282kb User : 康二栋
TFT_24 Downloaded：0: TFT scraper simple experiments, the TFT timing control, it is switched between red and blue. After a simple transformation can be used as a more powerful drive module.
Date : 2025-06-26 Size : 1.28mb User : 康二栋
sine-wave-generate Downloaded：0: Sine wave Generator using the direct digital synthesis Method
Date : 2025-06-26 Size : 153kb User : rss.nitk

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