VHDL-FPGA-Verilog List Page 555

VHDL-FPGA-Verilog list

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NCO Downloaded：0: The DDS FPGA-based design, through an external DA converter output stable sine wave, square wave and triangular wave, can produce a single clock, without the help of the hardware connection, including the register progra
Date : 2025-06-22 Size : 5.56mb User : 孙雨晗
1302 Downloaded：0: DS1302 clock chip control procedures. In the digital tube display time.
Date : 2025-06-22 Size : 422kb User : 孙帅斌
SUN Downloaded：0: Nios based on lattice Snake game, you can add a small keyboard PS2 games
Date : 2025-06-22 Size : 13.84mb User : lanxiaojun
Lab7 Downloaded：0: Adder Substrator
Date : 2025-06-22 Size : 14kb User : 夏宇婕
fre_cnt Downloaded：0: Frequency meter module FPGA-based, digital display frequency value
Date : 2025-06-22 Size : 1kb User : 郭永峰
FFT_VHDl Downloaded：0: VHDL fast Fourier transform, within the supplied data and source code.
Date : 2025-06-22 Size : 409kb User : eric
hdbn Downloaded：0: This “core” is actually two cores – an HDB3/HDB2/B3ZS Encoder that converts NRZ data into P and N pulses according to ITU-T G.703, and a HDB3/HDB2/B3ZS Decoder that converts P and N pulses into NRZ data according to ITU-
Date : 2025-06-22 Size : 9kb User : fronders
IIC_verilog Downloaded：0: IIC controllers, the source code verilog
Date : 2025-06-22 Size : 11kb User : 晨光
demodulation Downloaded：0: QPSK demodulation
Date : 2025-06-22 Size : 1kb User : 李晨曦
MyFCS1 Downloaded：0: FPGA software and hardware
Date : 2025-06-22 Size : 14.66mb User : 可可
PWM Downloaded：0: FPGA hardware design
Date : 2025-06-22 Size : 2kb User : 可可
Adaptive-filter Downloaded：0: Adaptive filter
Date : 2025-06-22 Size : 2kb User : wen

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