VHDL-FPGA-Verilog List Page 3009

VHDL-FPGA-Verilog list

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rs232-Quartus Downloaded：0: Using verilog syntax, to achieve the functions of serial rs232
Date : 2025-11-18 Size : 469kb User : 張三
lcd1602 Downloaded：0: With Verilog wrote that program, good 1602 very strong
Date : 2025-11-18 Size : 52kb User : 阿杜
CORDIC_sin_cos Downloaded：0: Based on the Verilog language cordic algorithm, calculate is cosine value
Date : 2025-11-18 Size : 214kb User : 阿杜
simple_divider Downloaded：0: Write a except time-multiplier, online is a multifarious ugly understand oneself write a simple and easy to understand
Date : 2025-11-18 Size : 400kb User : 阿杜
Basketball Downloaded：0: 此程序是关于篮球计数器的FPGA的代码，用的是ALTERA的板子
Date : 2025-11-18 Size : 1kb User : Hongbo
lcdtest Downloaded：0: Verilo LCD controller
Date : 2025-11-18 Size : 13kb User : Defton
music_yetong1 Downloaded：0: music play
Date : 2025-11-18 Size : 485kb User : 叶通
8250 Downloaded：0: Written in Verilog HDL serial interface controller 8255
Date : 2025-11-18 Size : 398kb User : anqi
div_fru Downloaded：0: Introduction divider good information. Not only have an odd frequency, even frequency, there are fractional. I believe understanding this information through the post after the Divider is not a problem.
Date : 2025-11-18 Size : 14kb User : chengpan
Ham_Code Downloaded：0: With verilog design way, we can check error control code with hamming code .
Date : 2025-11-18 Size : 9kb User : ananliu1
PILILED Downloaded：0: In ASIC flow, use verilog to insted of 8051 ASM code design.
Date : 2025-11-18 Size : 6kb User : ananliu1
frenquent Downloaded：0: Divider of some procedures. Including the integer frequency, fractional, and I feel very good information, not privately share. Point out to share. They want to study more carefully the next, certainly some perception.
Date : 2025-11-18 Size : 15kb User : chenkuijiao

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