VHDL-FPGA-Verilog List Page 2695

VHDL-FPGA-Verilog list

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uart_16550 Downloaded：0: A UART that is compatible with the industry standard 16550D includes wrappers for the Wishbone and AMBA APB busses
Date : 2025-11-21 Size : 239kb User : zhaohaiting
bchencodeanddecodewitcorrection Downloaded：0: bch encode and decode wit error correction for bch(255,233)
Date : 2025-11-21 Size : 1.66mb User : sandeep
verilogHDL_source Downloaded：0: verilogHDL source
Date : 2025-11-21 Size : 158kb User : 张扬
FFT2 Downloaded：0: 1024-point FFT C algorithm for NIOS
Date : 2025-11-21 Size : 2kb User : ogrex
flowbyte_shifter Downloaded：0: Module that can shift stream by one or more bits. It can be use for sinhronization in STM.
Date : 2025-11-21 Size : 1kb User : John
4x1_mux Downloaded：0: this is a simple Verilog source code for 4X1 mux.
Date : 2025-11-21 Size : 4kb User : firas
RISCcpu Downloaded：1: this is verilog model of RISC CPU
Date : 2025-11-21 Size : 138kb User : Harshit B J
remotecontrol Downloaded：0: this is source code written in vhdl to detect sony remote control bit sequence.
Date : 2025-11-21 Size : 9.58mb User : Harshit B J
enable_and_comb1 Downloaded：0: the implement of CPRI of Communication Protocol
Date : 2025-11-21 Size : 1kb User : 张扬
insert_cword1 Downloaded：0: the implement of CPRI of Communication Protocol，insert the control word of Ethernet
Date : 2025-11-21 Size : 2kb User : 张扬
G2C_interface_RX1 Downloaded：0: a interface unit between the cpri and the xaui core.
Date : 2025-11-21 Size : 1kb User : 张扬
mtspeed Downloaded：0: m method t method m encoder velocity verilog language law law sampling time interval period adjustable adjustable t
Date : 2025-11-21 Size : 1kb User : 王程序

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