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VHDL-FPGA-Verilog list
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uart_top
Downloaded:0
Verilog code of UART, tx, rx Jieke
Date
: 2025-09-19
Size
: 2.12mb
User
:
杨奔
flash016d_top
Downloaded:0
Control of the controller to read and write verilog code FLASH
Date
: 2025-09-19
Size
: 1mb
User
:
杨奔
isp_top
Downloaded:0
written spi flash controller verilog
Date
: 2025-09-19
Size
: 61kb
User
:
杨奔
TD-SCDMA_CFR
Downloaded:0
TD-SCDMA clipping algorithm implementation on FPGA
Date
: 2025-09-19
Size
: 1.1mb
User
:
mary
WCDMA_DPD
Downloaded:0
WCDMA Digital Repeater digital pre-distortion and its FPGA implementation
Date
: 2025-09-19
Size
: 3.74mb
User
:
mary
ec11-test
Downloaded:0
Taiwan-digital encoder potentiometer EC11 of testing procedures
Date
: 2025-09-19
Size
: 23kb
User
:
张金雷
flash_simulation
Downloaded:0
a flash control module and simulation, there are a flash model inside
Date
: 2025-09-19
Size
: 17kb
User
:
xin
4port-sdram
Downloaded:0
4-port SDRAM controller with verilog
Date
: 2025-09-19
Size
: 28kb
User
:
xin
PAPER
Downloaded:0
AD high speed sampling circuit design based on FPGA
Date
: 2025-09-19
Size
: 310kb
User
:
xin
disp_mux1
Downloaded:0
CPLD XC9572 BCD Calculater
Date
: 2025-09-19
Size
: 12kb
User
:
pG
Berlekamp_serial
Downloaded:0
thats the VHDL code for berlekamp serial multiplier
Date
: 2025-09-19
Size
: 270kb
User
:
guctiida
berlekamp_parallel
Downloaded:0
The Berlekamp multiplier [3] uses two basis representations, the polynomial basis for the multiplier and the dual basis for the multiplicand and the product. Because it is normal practice to input all data in the same ba
Date
: 2025-09-19
Size
: 153kb
User
:
guctiida
«
1
2
...
.02
.03
.04
.05
.06
2007
.08
.09
.10
.11
.12
...
4310
»
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