VHDL-FPGA-Verilog List Page 1628

VHDL-FPGA-Verilog list

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elevmain1 Downloaded：0: this is code fro elevator in vhdl
Date : 2025-09-14 Size : 29kb User : jaimin patel
dianzizhong Downloaded：0: FPGA implementation of multi-function electronic clock procedures, including brightness adjustment, the reality and adjustment of the time and date, alarm clock and stopwatch
Date : 2025-09-14 Size : 820kb User : 刘振良
RS485 Downloaded：0: / DM430-L-type development board RS485 communication experiment, through the development board and computer data communications, 485 connection of the UART1
Date : 2025-09-14 Size : 22kb User : 陈尚权
i2c_fsm.v Downloaded：0: This a verilog module which describes a i2c slave fsm with one-hot encode.
Date : 2025-09-14 Size : 1kb User : sunruns
MyTimer Downloaded：0: Functional description of electronic clock： Electronic clock has a total of five kinds of functions: function 1 is a digital clock functional digital stopwatch function 3 for the transfer function set the alarm clock fun
Date : 2025-09-14 Size : 7.29mb User : lzf
BouncingBall Downloaded：0: VGA display pool game Hardware platforms: the DE2-70 development board The control buttons can adjust the size and velocity of the ba
Date : 2025-09-14 Size : 3.02mb User : lzf
6303346Viterbi217_IP Downloaded：0: so good itis for us student
Date : 2025-09-14 Size : 74kb User : 张憨
viterbi234 Downloaded：0: very good
Date : 2025-09-14 Size : 223kb User : 张憨
Multiplier4X4 Downloaded：0: Multiplier: 4-bit* 4bit, two inputs, one input, this is a verilog program name Multiplier4X4, function is multiplication.
Date : 2025-09-14 Size : 205kb User : MJ
Timer Downloaded：0: This time counter the name Timer.rar, the function of the electronic clock display can be divided into minutes and seconds.
Date : 2025-09-14 Size : 1kb User : MJ
FIFO Downloaded：0: This I learn when the original code FPGA in person, the realization of 8 x8 is the fifo structure, the synchronization of the fifo structure, the simulation test is a success!
Date : 2025-09-14 Size : 550kb User : xie hao
key_scan Downloaded：0: This when the FPGA write their own learning keyboard scan code. Use is edge detection method, and its filtering processing, I test simulation success!
Date : 2025-09-14 Size : 359kb User : xie hao

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