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VHDL-FPGA-Verilog list
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ChipScope
Downloaded:0
FPGA chipscope
Date
: 2025-08-29
Size
: 355kb
User
:
李斌
FSM
Downloaded:0
fpga fsm verilog
Date
: 2025-08-29
Size
: 1.07mb
User
:
李斌
number_clock
Downloaded:0
FPGA Verilg clock
Date
: 2025-08-29
Size
: 51kb
User
:
李斌
lx15
Downloaded:0
UART serial communication has been successfully tested on the IDE2
Date
: 2025-08-29
Size
: 355kb
User
:
huag
UART
Downloaded:0
Is 1.UART a UART IP core can directly call the other program, the baud rate is 9600.
Date
: 2025-08-29
Size
: 1.94mb
User
:
金华
DEMO_V
Downloaded:0
Black Gold FPGA development board (student) test procedures VHDL language, including the detection of serial lcd led key
Date
: 2025-08-29
Size
: 123kb
User
:
zhang
viterbi-ip-core-using-mothed
Downloaded:0
Instructions for use of the FPGA Viterbi decoder IP core, easy glance. Can tcm decoding powerful!
Date
: 2025-08-29
Size
: 53kb
User
:
火山灰
UART_TX
Downloaded:0
The xilinx urat to send port source programs, the module can be called directly
Date
: 2025-08-29
Size
: 2kb
User
:
滕景忠
verilog_
Downloaded:0
VERILOG language applications, basic grammatical structures, application examples introduced
Date
: 2025-08-29
Size
: 1.48mb
User
:
taiping
ISE9.1
Downloaded:0
ISE software Chinese tutorial, program preparation, synthesis, simulation, and upload.
Date
: 2025-08-29
Size
: 7.34mb
User
:
taiping
dds_ds558
Downloaded:0
DDS Data Sheet describes the application of the principle, the use of description of each pin.
Date
: 2025-08-29
Size
: 555kb
User
:
taiping
simple_count.tar
Downloaded:0
Simple program to count and make an output blink
Date
: 2025-08-29
Size
: 123kb
User
:
obiwan
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