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VHDL-FPGA-Verilog list
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arm
Downloaded:0
ARM core
Date
: 2025-08-29
Size
: 8kb
User
:
阿汤哥
serial-to-parallel
Downloaded:0
Learning string and converts the code written to recognize the writing style and skills, fpga official website of the code design, can be used directly, through simulation
Date
: 2025-08-29
Size
: 1kb
User
:
阿汤哥
uart
Downloaded:0
A simple serial port description file, you can achieve the basic function of serial
Date
: 2025-08-29
Size
: 1kb
User
:
阿汤哥
UART16550(Verilog)
Downloaded:0
Through various simulation module code is a standard module, can be used directly
Date
: 2025-08-29
Size
: 11kb
User
:
阿汤哥
8b10encode
Downloaded:0
8b10b encoder design of high-speed data transmission encoding, including source code, there are specific design documents
Date
: 2025-08-29
Size
: 763kb
User
:
阿汤哥
verilog-handouts
Downloaded:0
Carnegie Mellon University verilog handouts, including synthesis, simulation, behavioral modeling
Date
: 2025-08-29
Size
: 229kb
User
:
雷亮
Lab_COUNTER
Downloaded:0
Lab experiment : 50 MHz clk 4 bit counter (CLR + parallel load + pause ) on spartan3e
Date
: 2025-08-29
Size
: 2kb
User
:
fox
Lab_LCD
Downloaded:0
Building a character LCD interface on Spartan-3E FPGA
Date
: 2025-08-29
Size
: 2kb
User
:
fox
Lab-PS2
Downloaded:1
implementing PS2 interface on Spartan-3E FPGA Kit (including the ucf file + PS2 module + main moudel as top level )
Date
: 2025-08-29
Size
: 2kb
User
:
fox
adding-ad1981-ac97-coced-as-OBP-in-ML505-kit
Downloaded:0
inlcluded : AD1985 interface IP + C software for standalone microblaze using this interface to communicate with AD1985 codec
Date
: 2025-08-29
Size
: 51kb
User
:
fox
cordic_atan
Downloaded:0
24 iterations of the three pipeline cordic vector mode
Date
: 2025-08-29
Size
: 3kb
User
:
呵呵呵
Bus_REG_Clk_Crosser
Downloaded:0
Clock crosser of register bus
Date
: 2025-08-29
Size
: 1kb
User
:
zomepolle
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