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VHDL-FPGA-Verilog list
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2DPSK modulation and demodulation. The student experiments, including the source module clock source generation module, signal modulation module, signal demodulation module. Contains a the blocking statement under the ed
Date : 2026-01-18 Size : 247kb User : 韩业实

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Written in verilog DQPSK modulation phase selection
Date : 2026-01-18 Size : 1kb User : 曾俊

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FPGA chip as the core processor, PSK modulation and demodulation functions
Date : 2026-01-18 Size : 71kb User : sunflower

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FPGA as the core controller MPSK modulation and demodulation functions
Date : 2026-01-18 Size : 38kb User : sunflower

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Altera SOPC VideoFramework with TRDB-DC2 and TFT-LCD
Date : 2026-01-18 Size : 2.28mb User : hungjunhao

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Typical examples 11.5 FPGA chip hardware multiplier using the software development environment: ISE 7.1i hardware development environment: red hurricane II generation-Xilinx version instance to achieve an IIR filter, sim
Date : 2026-01-18 Size : 1.06mb User : jarod

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i2c slave interface
Date : 2026-01-18 Size : 2kb User : sunisi2008

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Using a linear feedback shift register to generate pseudorandom numbers, the application in a communication system
Date : 2026-01-18 Size : 112kb User : ZhanminWu

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Optical encoder using VHDL written. And quartus software simulation. The final use of photoelectric encoder download FPGA board.
Date : 2026-01-18 Size : 4.16mb User : 牛满

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Day la truong chinh cua tao, moi nguoi nho tham khao nhe.
Date : 2026-01-18 Size : 350kb User : hoa

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veilog design of auto_seller
Date : 2026-01-18 Size : 1.21mb User : petty

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- Press the learning board KEY1 key and the KEY2 key, LED lantern display the state- KEY3 as selector switch - 1 high level gating a channel signal is key1 0 low level strobe b Road signal is key2
Date : 2026-01-18 Size : 1kb User : lixiaolong
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