VHDL-FPGA-Verilog List Page 1180

VHDL-FPGA-Verilog list

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seg71 Downloaded：0: 7-segment LED display program written in Verilog HDL.
Date : 2025-08-22 Size : 33kb User : 陈
serial Downloaded：0: The Verilog HDL written serial communication program.
Date : 2025-08-22 Size : 340kb User : 陈
state-machine Downloaded：0: The Verilog HDL written a simple state machine program.
Date : 2025-08-22 Size : 160kb User : 陈
FPGA-experiment Downloaded：0: the fpga Experience fpga design ideas and methods of the
Date : 2025-08-22 Size : 928kb User : 龚志文
FPGA-design-circuit Downloaded：0: the fpga Experience fpga design ideas and methods of the
Date : 2025-08-22 Size : 35kb User : 龚志文
01_basic Downloaded：0: FPGA code development, including the basic code
Date : 2025-08-22 Size : 2.7mb User : 小杨
synthesis Downloaded：0: Verilog code and some basic examples.
Date : 2025-08-22 Size : 16kb User : Raghav405
LED_VHDL Downloaded：0: VHDL control light off of the light-emitting diodes
Date : 2025-08-22 Size : 344kb User : lili
IR Downloaded：0: ir receive and display
Date : 2025-08-22 Size : 16kb User : 孙兵
cpu Downloaded：0: Prepared by the VHDL the CPU source, embeddable SOPC system development
Date : 2025-08-22 Size : 308kb User : wrk
timer_16bits Downloaded：0: an 16 bits timer,can userd for system s time dispatch.
Date : 2025-08-22 Size : 1kb User : xujie
SIMULATION-AND-SYNTHESIS-OF-TRIPLE-DES-BLOCK-CIPH Downloaded：0: This project presents FPGA implementations of the DES and Triple-DES with improved security against power analysis attacks. The proposed designs use Boolean masking, a previously introduced technique to protect smart ca
Date : 2025-08-22 Size : 5.12mb User : abilash

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