VHDL-FPGA-Verilog List Page 1051

VHDL-FPGA-Verilog list

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clk_div_50 Downloaded：0: a kind of frequently used frequency divider as the divider factor is 50 in the code, you can change it as your wish.
Date : 2025-08-12 Size : 352kb User : 宫杰
Fmeter Downloaded：0: FPGA-based VHDL procedures to achieve double-precision frequency meter functions, including frequency counting, measuring duty cycle, etc.
Date : 2025-08-12 Size : 366kb User : 杨志超
VGA_chinese_show Downloaded：0: Using the Verilog language design, VGA on the character display, with good results.
Date : 2025-08-12 Size : 541kb User : 蒲公英
Reg_16 Downloaded：0: Use Verilog language to design a 16 state machine
Date : 2025-08-12 Size : 17kb User : Wing
coa Downloaded：0: In Modelsim achieve class multi-cycle pipelined processor MIPS
Date : 2025-08-12 Size : 446kb User : Wing
StopWatch Downloaded：0: In Modelsim6.3c encoding, and Virtex-II Pro development board to achieve a stopwatch function
Date : 2025-08-12 Size : 5kb User : Wing
fifo Downloaded：0: In Modelsim6.3c achieve synchronous fifo
Date : 2025-08-12 Size : 16kb User : Wing
fpga_counter Downloaded：0: Grating count, serial transmission
Date : 2025-08-12 Size : 565kb User : 吴晓成
vga_clorbar Downloaded：0: VGA display color bar program, main function is to VGA video driver
Date : 2025-08-12 Size : 265kb User : hanbo
CAL Downloaded：0: BCD to decimal ALU based design can achieve the arithmetic function
Date : 2025-08-12 Size : 16kb User : 任毅
calculator Downloaded：0: Seven decimal calculator designed to achieve a simple calculation formula, enclosing testbench file
Date : 2025-08-12 Size : 18.91mb User : 任毅
Experiment Downloaded：0: verilog for the HeiJin FPGA
Date : 2025-08-12 Size : 15.98mb User : 黄晓清

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