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[VHDL-FPGA-Verilog] VHDL

Description: VHDL控制步进电机原理PDF文档非常有用，看看吧-VHDL control of stepper motor principle of PDF files is very useful to see it
Platform: | Size: 199680 | Author: 王攀 | Hits:

[Other] VHDL

Description: VHDL讲述其发展历史及主要语法，以及应用开发事项-VHDL about its development history and the main grammar, as well as application development matters
Platform: | Size: 285696 | Author: yang | Hits:

[VHDL-FPGA-Verilog] VHDL

Description: 几个ＶＨＤＬ的编程实例-Several examples of VHDL programming
Platform: | Size: 3303424 | Author: 张宇辉 | Hits:

[Other] ref-sdr-sdram-vhdl

Description: FPGA连接SDRAM的源程序，VHDL语言实现，功能基本完全。应用效果好。-FPGA connected SDRAM source, VHDL language, the basic function fully. Application effective.
Platform: | Size: 732160 | Author: young | Hits:

[VHDL-FPGA-Verilog] vhdl--timer

Description: 关于基于fpga的，数字化时钟vhdl实现源程序，推荐大家下载仿真实现。-On the FPGA-based, digital clock source VHDL realize recommend everyone to download simulation.
Platform: | Size: 6144 | Author: sxd | Hits:

[Books] VHDl

Description: VHDL数字控制系统设计范例，PDG格式的，希望对大家有用！-VHDL Examples of digital control system design, PDG format, in the hope that useful to everybody!
Platform: | Size: 6585344 | Author: gjd | Hits:

[ARM-PowerPC-ColdFire-MIPS] VHDL-timer

Description: 这是关于VHDL时钟的源代码，欢迎大家下载交流！-This is a clock on the VHDL source code, welcomed the exchange of everyone to download!
Platform: | Size: 7168 | Author: 张三 | Hits:

[VHDL-FPGA-Verilog] Vhdl-Parser-0.12.tar

Description: 這是一個VHDL的parser目前版本為0.12-This is a VHDL version of the parser is currently 0.12
Platform: | Size: 13312 | Author: 黃彥華 | Hits:

Description: 本系统使用VHDL语言进行设计，采用自上向下的设计方法。目标器件选用Xilinx公司的FPGA器件，并利用Xilinx ISE 7.1 进行VHDL程序的编译与综合，然后用Modelsim Xilinx Edition 6.1进行功能仿真和时序仿真。-The system design using VHDL language, using top-down design method. Selection of the target device Xilinx
Platform: | Size: 297984 | Author: 西西 | Hits:

[Other] VHDL

Description: 上海交通大学电子信息与电气工程学院电子工程系VHDL经典教程，-Shanghai Jiaotong University Electronic Information and Electrical Engineering, School of Electronic Engineering VHDL Tutorial classic,
Platform: | Size: 3103744 | Author: 潘星光 | Hits:

[Other] VHDL

Description: 东南大学电工电子实验中心徐莹隽老师的VHDL数字系统设计，对于VHDL的初学者非常适合。-Southeast University, Electrical and Electronic Experiment Center Jun Xu Ying teachers VHDL digital system design, the VHDL is well suited for beginners.
Platform: | Size: 1509376 | Author: 杨春山 | Hits:

[Books] VHDL-chengxusheji

Description: vhdl程序设计,是学习硬件描述语言的良好资料,是硬件工程师的必备资料.-VHDL programming, hardware description language is to learn from the good data is essential information on the hardware engineers.
Platform: | Size: 613376 | Author: 方军 | Hits:

[Embeded-SCM Develop] VHDL

Description: VHDL数字钟数字电子钟此数字电子钟具有的功能包括： 1. 计时，时、分、秒显示； 2. 十二小时与二十四小时之间的转换； 3. 上下午显示； 4. 对时、分、秒的校时功能；-VHDL digital clock digital clock digital electronic clock with this function include: 1. Time, hours, minutes and seconds display 2. 12 hours and 24 hours between the conversion 3. On the afternoon show 4. hours, minutes and seconds of the school function
Platform: | Size: 3072 | Author: HJGJGHK | Hits:

[VHDL-FPGA-Verilog] VHDL

Description: 自编自写的ＶＨＤＬ代码，用于实现全加器功能，可能有误-, Directed and written in VHDL code, for the realization of full-adder function, may have mistaken
Platform: | Size: 4096 | Author: 金嘉 | Hits:

[Software Engineering] vhdl

Description: VHDL是Very High Speed Integrated Circuit Hardware Description Language的缩写，意思是超高速集成电路硬件描述语言。对于复杂的数字系统的设计，它有独特的作用。它的硬件描述能力强，能轻易的描述出硬件的结构和功能。这种语言的应用至少意味着两种重大的改变：电路的设计竟然可以通过文字描述的方式完成；电子电路可以当作文件一样来存储。随着现代技术的发展，这种语言的效益与作用日益明显，每年均能够以超过30％的速度快速成长。这次毕业设计的内容是在简要介绍了VHDL语言的一些基本语法和概念后，进一步应用VHDL，在MAX+plusII 的环境下设计一个电子钟，最后通过仿真出时序图实现预定功能。电子钟的时间显示用到了七段数码管(或称七段显示器)的电路设计，内部的时间控制输出则用到了各种设计，包括：加法计数器，扫描电路，控制秒、分、时的分频电路，各种数制的转换。 -err
Platform: | Size: 473088 | Author: 造型 | Hits:

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[VHDL-FPGA-Verilog] VHDL

[Other] VHDL

[VHDL-FPGA-Verilog] VHDL

[Other] ref-sdr-sdram-vhdl

[VHDL-FPGA-Verilog] vhdl--timer

[Books] VHDl

[ARM-PowerPC-ColdFire-MIPS] VHDL-timer

[VHDL-FPGA-Verilog] Vhdl-Parser-0.12.tar

[Software Engineering] VHDL

[Other] VHDL

[Other] VHDL

[Books] VHDL-chengxusheji

[Embeded-SCM Develop] VHDL

[VHDL-FPGA-Verilog] VHDL

[Software Engineering] vhdl

[VHDL-FPGA-Verilog] VHDL

[VHDL-FPGA-Verilog] VHDL

[VHDL-FPGA-Verilog] VHDL

[VHDL-FPGA-Verilog] vhdl

[VHDL-FPGA-Verilog] VHDL-Cookbook

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