Search - verilog

[VHDL-FPGA-Verilog] Viterbi_v

Description: Viterbi算法的Verilog源代码。-Viterbi Algorithm Verilog source code.
Platform: | Size: 11264 | Author: qjyong | Hits:

[VHDL-FPGA-Verilog] samll

Description: 这是一组Verilog的代码小程序，适合新手练习使用．-This is a group of small Verilog code procedures for the use of novice practitioners.
Platform: | Size: 9216 | Author: 藏瑞 | Hits:

[VHDL-FPGA-Verilog] firISPdesign

Description: fir ISP design fir VHDL VHDL编程滤波的硬件描述语言实现，包括VHDL语言和verilog语言-fir fir VHDL design ISP programming VHDL hardware description of the filter language , including the VHDL language and verilog
Platform: | Size: 112640 | Author: xiong | Hits:

[VHDL-FPGA-Verilog] Verilog_FPGA_fp

Description: 用Verilog实现基于FPGA的通用分频器-using Verilog FPGA-based Universal Frequency Divider
Platform: | Size: 124928 | Author: xiong | Hits:

[VHDL-FPGA-Verilog] verilog_latch

Description: verilog实现锁存器，共有四个文件，包含测试文件-verilog achieve latches, a total of four documents, including test paper
Platform: | Size: 1024 | Author: zzm | Hits:

[VHDL-FPGA-Verilog] verilogfifo

Description: verilog HDL实现先进先出栈，不含测试文件-verilog HDL achieve first-in first-out stack, non-test document
Platform: | Size: 1024 | Author: zzm | Hits:

[VHDL-FPGA-Verilog] verilog_multiplier

Description: verilog实现16*16位乘法器，带测试文件-verilog achieve 16* 16 multiplier, with test documents
Platform: | Size: 25600 | Author: zzm | Hits:

[Software Engineering] VerilogHDLshejifengpingqihe32weijishuqi

Description: 本文件介绍的是用VerilogHDL语言设计分频器和32位计数器.-This paper presents the design using Verilog HDL language Frequency Divider and 32 counters.
Platform: | Size: 158720 | Author: 少华 | Hits:

[Wavelet] verilogpll1234

Description: 基于verilog的全数字锁相环的设计，基于verilog的全数字锁相环的设计。-verilog DPLL the design, verilog based on the DPLL design.
Platform: | Size: 93184 | Author: li | Hits:

[VHDL-FPGA-Verilog] hdb3_verilog

Description: modelsim工程，用verilog实现的HDB3编码，以及测试程序testbench-modelsim works with verilog realized HDB3 coding, and testing procedures testbench
Platform: | Size: 22528 | Author: chengroc | Hits:

[Other] I2CbusVHDLVerilogHDL

Description: i2c总线verilog源代码，包括测试模块-i2c Bus verilog source code, including testing module
Platform: | Size: 509952 | Author: 张云凤 | Hits:

[VHDL-FPGA-Verilog] SimpleSpi

Description: master spi的源代码（verilog），包括文档，测试程序-master spi the source code (verilog), including documentation, testing procedures
Platform: | Size: 180224 | Author: wood | Hits:

[VHDL-FPGA-Verilog] Verilog_Development_Board_Sources

Description: 朋友，我是Jawen.看到先前上载的一套CPLD开发板的VHDL源码挺受欢迎的，现在就将她的Verilog源码也一并贡献给大家：8位优先编码器,乘法器,多路选择器,二进制转BCD码,加法器,减法器,简单状态机,四位比较器,7段数码管,i2c总线,lcd液晶显示,拨码开关,串口,蜂鸣器,矩阵键盘,跑马灯,交通灯,数字时钟-friends, I Jawen. previously seen on the set of CPLD Development Board VHDL source code quite welcome, Now she will also be Verilog source contribution to everyone : eight priority encoder, multipliers, Multi-channel selector, binary to BCD, adder, subtraction device, the simple state machine, four comparators, 7 of the digital control, i2c bus, lcd LCD allocated code switches, serial port, the buzzer sounded, matrix keyboards, Bomadeng. Traffic lights, digital clock
Platform: | Size: 3151872 | Author: Jawen | Hits:

[Other] chinese_VerilogHDL

Description: Verilog HDL是一种硬件描述语言，用于从算法级、门级到开关级的多种抽象设计层次的数字系统建模，想学习的这个资料对你有用。-Verilog HDL is a hardware description language, for the algorithm level, gate-level to switch-level abstract design of the multiple levels of system modeling, want to study this information be useful to you.
Platform: | Size: 32768 | Author: 刘斐 | Hits:

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[VHDL-FPGA-Verilog] Viterbi_v

[VHDL-FPGA-Verilog] samll

[VHDL-FPGA-Verilog] firISPdesign

[VHDL-FPGA-Verilog] Verilog_FPGA_fp

[VHDL-FPGA-Verilog] verilog_latch

[VHDL-FPGA-Verilog] verilogfifo

[VHDL-FPGA-Verilog] verilog_multiplier

[Software Engineering] VerilogHDLshejifengpingqihe32weijishuqi

[Wavelet] verilogpll1234

[VHDL-FPGA-Verilog] hdb3_verilog

[Other] I2CbusVHDLVerilogHDL

[VHDL-FPGA-Verilog] SimpleSpi

[VHDL-FPGA-Verilog] Verilog_Development_Board_Sources

[Other] chinese_VerilogHDL

[VHDL-FPGA-Verilog] usb_verilog.tar

[VHDL-FPGA-Verilog] Verilogmanual

[Other] VerilogHDL_book

[VHDL-FPGA-Verilog] simple_cpu

[VHDL-FPGA-Verilog] sdram_verilog

[VHDL-FPGA-Verilog] traffic2

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