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[SourceCode] RS编码verilog程序

Description: RS(Reed-Solomon)码是差错控制领域中一类重要的线性分组码，由于其出众的纠错能力，被广泛地应用于各种差错控制系统中，以满足对数据传输通道可靠性的要求。
Platform: | Size: 927 | Author: dafanxiaoqiao | Hits:

[VHDL-FPGA-Verilog] RS(32to28)encoderanddecoder

Description: RS(32,28) encoder and decoder VHDL-RS (32,28) encoder and decoder VHDL
Platform: | Size: 76800 | Author: 王文 | Hits:

[Industry research] VLSI_Architectures_for_ECC

Description: This thesis devoted to several efficient VLSI architecture design issues in errorcorrecting coding, including finite field arithmetic, (Generalized) Low-Density Parity- Check (LDPC) codes, and Reed-Solomon codes.-This thesis is devoted to several efficient VLSI architecture design issues in errorcorrecting coding, including finite field arithmetic, (Generalized) Low-Density Parity- Check (LDPC) codes, and Reed-Solomon codes.
Platform: | Size: 1072128 | Author: MicroSam | Hits:

[Other systems] reed

Description: this the completedocumentation and code about reed solomon logic implemented on fpga in verilog.-this is the completedocumentation and code about reed solomon logic implemented on fpga in verilog.
Platform: | Size: 1872896 | Author: kamranmu | Hits:

[VHDL-FPGA-Verilog] reedsolomon

Description: reed solomon encoder synthesis and simulation is done using verilog and working fine
Platform: | Size: 1126400 | Author: priya | Hits:

[Other] rsencoder_latest.tar

Description: reed solomon encoder (255,239) verilog source code
Platform: | Size: 4096 | Author: 梅国强 | Hits:

[VHDL-FPGA-Verilog] reed_solomon_decoder_latest.tar

Description: reed solomon (204,188). in verilog.
Platform: | Size: 179200 | Author: Evgeny | Hits:

[VHDL-FPGA-Verilog] rsencoder_latest.tar

Description: reed solomon encoder in verilog-reed solomon encoder in verilog
Platform: | Size: 4096 | Author: jagadesh | Hits:

[VHDL-FPGA-Verilog] reed_solomon_codec_generator.tar

Description: reed solomon encoder verilog code.-reed solomon encoder verilog code.
Platform: | Size: 1141760 | Author: tmanev | Hits:

[VHDL-FPGA-Verilog] rs_encoder

Description: reed solomon encoder used in DVB verilog code.
Platform: | Size: 5120 | Author: tmanev | Hits:

[assembly language] bluespec-reedsolomon_latest.tar

Description: Reed Solomon decoder implemented in VHDL/Verilog. Includes ASM s
Platform: | Size: 33792 | Author: ahmed | Hits:

[VHDL-FPGA-Verilog] reed_solomon_decoder

Description: Reed Solomon Decoder written in Verilog Libero core generator.-Reed Solomon Decoder written in Verilog Libero core generator.
Platform: | Size: 8192 | Author: roob | Hits:

[Other] 62628

Description: Reed Solomon MATLAB Code Verilog Code RSCODE -Reed Solomon MATLAB Code Verilog Code RSCODE RSRS
Platform: | Size: 210944 | Author: Jung Gum-Yong | Hits:

[VHDL-FPGA-Verilog] synd

Description: Syndrome calculator basic unit for reed solomon decoder in verilog language
Platform: | Size: 1024 | Author: humberto | Hits:

[Communication-Mobile] rs_15_11

Description: ReedSolomon RS(15,11) Verilog 编码和解码测试程序 编码有两种实现方式 串行和并行方式(ReedSolomon RS(15,11) Verilog Encoder&Decoder)
Platform: | Size: 14336 | Author: Ericxgj | Hits:

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