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Title: reedsolomon Download
 Description: reed solomon encoder synthesis and simulation is done using verilog and working fine
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File list (Check if you may need any files):
final reedsolmn
...............\final rs doc.doc
...............\with k
...............\......\berk.v
...............\......\chein.v
...............\......\codechecker.v
...............\......\data.v
...............\......\decode.v
...............\......\encode.v
...............\......\errordec.v
...............\......\hamming.v
...............\......\inverse.v
...............\......\rs
...............\......\..\berk.v
...............\......\..\chein.v
...............\......\..\codechecker.v
...............\......\..\data.v
...............\......\..\decode.v
...............\......\..\encode.v
...............\......\..\errordec.v
...............\......\..\hamming.v
...............\......\..\inverse.v
...............\......\..\prjname.lso
...............\......\..\rs.ise
...............\......\..\rs.ise_ISE_Backup
...............\......\..\rs_tb.v
...............\......\..\selfdec.v
...............\......\..\self_ tb.v
...............\......\..\synd.v
...............\......\..\test.v
...............\......\..\top.v
...............\......\..\topself.cmd_log
...............\......\..\topself.lso
...............\......\..\topself.prj
...............\......\..\topself.syr
...............\......\..\topself.v
...............\......\..\topself.xst
...............\......\..\topself_summary.html
...............\......\..\topself_vhdl.prj
...............\......\..\xst
...............\......\..\...\projnav.tmp
...............\......\..\...\work
...............\......\..\...\....\hdllib.ref
...............\......\..\...\....\vlg00
...............\......\..\...\....\.....\rsdec__syn__m11.bin
...............\......\..\...\....\.....\rs__enc__m28.bin
...............\......\..\...\....\vlg01
...............\......\..\...\....\.....\rsdec__syn__m12.bin
...............\......\..\...\....\.....\rs__enc__m29.bin
...............\......\..\...\....\vlg02
...............\......\..\...\....\.....\rsdec__syn__m13.bin
...............\......\..\...\....\vlg03
...............\......\..\...\....\.....\rsdec__syn__m14.bin
...............\......\..\...\....\vlg04
...............\......\..\...\....\.....\rsdec__syn__m15.bin
...............\......\..\...\....\.....\rsdec__syn__m20.bin
...............\......\..\...\....\vlg05
...............\......\..\...\....\.....\rsdec__syn__m16.bin
...............\......\..\...\....\.....\rsdec__syn__m21.bin
...............\......\..\...\....\.....\topself.bin
...............\......\..\...\....\vlg06
...............\......\..\...\....\.....\rsdec__syn__m17.bin
...............\......\..\...\....\.....\rsdec__syn__m22.bin
...............\......\..\...\....\vlg07
...............\......\..\...\....\.....\rsdec__syn__m18.bin
...............\......\..\...\....\.....\rsdec__syn__m23.bin
...............\......\..\...\....\vlg08
...............\......\..\...\....\.....\codechecker.bin
...............\......\..\...\....\.....\rsdec__syn__m19.bin
...............\......\..\...\....\.....\rsdec__syn__m24.bin
...............\......\..\...\....\vlg09
...............\......\..\...\....\.....\rsdec__syn__m25.bin
...............\......\..\...\....\.....\rsdec__syn__m30.bin
...............\......\..\...\....\vlg0A
...............\......\..\...\....\.....\rsdec__syn__m26.bin
...............\......\..\...\....\.....\rsdec__syn__m31.bin
...............\......\..\...\....\vlg0B
...............\......\..\...\....\.....\rsdec__syn__m27.bin
...............\......\..\...\....\vlg0C
...............\......\..\...\....\.....\rsdec__syn__m28.bin
...............\......\..\...\....\vlg0D
...............\......\..\...\....\.....\rsdec__syn__m29.bin
...............\......\..\...\....\vlg0E
...............\......\..\...\....\.....\selfdec.bin
...............\......\..\...\....\vlg1B
...............\......\..\...\....\.....\rsdec__chien__scale10.bin
...............\......\..\...\....\vlg1C
...............\......\..\...\....\.....\rsdec__chien__scale11.bin
...............\......\..\...\....\vlg1D
...............\......\..\...\....\.....\rsdec__chien__scale12.bin
...............\......\..\...\....\vlg1E
...............\......\..\...\....\.....\rsdec__chien_

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