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[VHDL-FPGA-Verilog] FPGAprogram1

Description: 常用键盘消抖模块——VHDL源程序！！！对vhdl编程的人具有很大的帮助，不可不看 -common keyboard Consumers shaking module-- VHDL source! ! ! Right VHDL programming of great help, I can not s
Platform: | Size: 2048 | Author: 许嘉 | Hits:

[Communication] maxplus2

Description: 关于CPLD的文章 不错的! 可以给菜菜参考下-article on the CPLD good! Can either under reference
Platform: | Size: 17325056 | Author: 许辉 | Hits:

[Windows Develop] VHDLgdewrrrrrrrrrrrr

Description: 本设计中选用目前应用较广泛的VHDL硬件电路描述语言，实现对路口交通灯系统的控制器的硬件电路描述，通过编译、仿真，并下载到CPLD器件上进行编程制作，实现交通灯系统的控制过程。EDA技术是用于电子产品设计中比较先进的技术，可以代替设计者完成电子系统设计中的大部分工作，而且可以直接从程序中修改错误及系统功能而不需要硬件电路的支持，既缩短了研发周期，又大大节约了成本，受到了电子工程师的青睐。实现路口交通灯系统的控制方法很多，可以用标准逻辑器件、可编程序控制器PLC、单片机等方案来实现。但是这些控制方法的功能修改及调试都需要硬件电路的支持，在一定程度上增加了功能修改及系统调试的困难。因此，在设计中采用EDA技术，应用目前广泛应用的VHDL硬件电路描述语言，实现交通灯系统控制器的设计，利用MAXPLUSⅡ集成开发环境进行综合、仿真，并下载到CPLD可编程逻辑器件中，完成系统的控制作用。-the current design was chosen over a wide range of VHDL hardware description language circuit. Implementation of traffic lights at the junction of the controller hardware circuit description, compiler, simulation, to download and CPLD programming on production, traffic signal system to achieve the control process. EDA technology is used to design electronic products more advanced technology, designers can replace the complete electronic system design most of the work, but can directly from the process to amend the mistakes and system functions without the need for hardware circuits of support, both to shorten the development cycle, another significant cost savings by the electronic engineers of all ages. Achieving junction traffic signal system control many ways, using standard logic devic
Platform: | Size: 4096 | Author: jazvy | Hits:

[VHDL-FPGA-Verilog] EDAchuzuchejijia

Description: 在本示例程序中，用VHDL语言实现了出租车的记价功能，在Maxplus2环境下编写，可通过cpld下载板来验证程序。在压缩包中附有示例的目的，方法和仿真时序图，是学习VHDL好例子。-in this sample program, using VHDL of the entry price of a taxi function, in preparation FLEX10K environment, through cpld download plate to the verification process. The compression package with the purpose of example, the simulation methods and timing diagrams, is a good example to learn VHDL.
Platform: | Size: 339968 | Author: bkd | Hits:

[Program doc] edaclock

Description: maxplus2变得电子钟程序/// ///// -maxplus2 become electronic bell procedures
Platform: | Size: 683008 | Author: xuemiao | Hits:

[VHDL-FPGA-Verilog] clock_CPLD

Description: 采用MaxPlusII写的一个小时钟程序，也是供初学参考。呵呵。注///版主，开发环境里面没有MaxPlusII.-MaxPlusII used to write a small clock procedures, as well as reference for beginners. Ha ha. Note///moderator, development environment there's no MaxPlusII.
Platform: | Size: 812032 | Author: Backy | Hits:

[Compress-Decompress algrithms] usb(FPGA)

Description: 基于FPGA的usb程序，采用VHDL语言编写。 开发环境为ISE或者MAXPLUS2。-FPGA-based usb procedures, using VHDL language. Development Environment for the ISE or MAXPLUS2.
Platform: | Size: 140288 | Author: 李浩 | Hits:

[Algorithm] wuzhe

Description: 应用maxplus ii 进行编写工作，主要是进行仿真,很有用-maxplus ii application for the preparation work is primarily for simulation, useful
Platform: | Size: 3072 | Author: 文责 | Hits:

[Other] VHDL-FPGA-clock

Description: ＦＰＧＡ数字钟的设计，用VHDL语言编程，max+plus仿真，可在实际电路中验证-FPGA design, VHDL programming, max plus simulation, in the actual circuit verification
Platform: | Size: 269312 | Author: 王越 | Hits:

[Software Engineering] maxplus2shizishizhong

Description: 数字电子钟的设计 （二十四小时六十分钟六十秒）-digital electronic clock design (24 hours 60 minutes 60 seconds)
Platform: | Size: 500736 | Author: yan | Hits:

[Embeded-SCM Develop] vhdlllbaogao

Description: 成都理工大学基于MAXPLUS II 的设计过程报告内涵有源程序及设计过程中的调试：在文本编辑窗口中输入二进制8位优先编码器的程序； 3设计驱动显示程序如下： 5采用原理图方式设计如下： 6引角分配图如下： 7仿真结果如下： -Chengdu University of Technology II-based FPGA design process report connotation source and the design process Debugging : in the text editing window importation of eight priority binary coding of procedures; 3 shows the design-driven procedures are as follows : 5 diagram using design methods are as follows : 6 primers angle distribution plan are as follows : 7 simulation results are as follows :
Platform: | Size: 432128 | Author: 梁兵 | Hits:

[Other] vhdl

Description: 基于MAXPLUS II 的软件设计，这里面有几个小程序，用于VHDL的GDF设计，含有LED数码管的显示驱动程序，还有3选一，十选一程序。-II FPGA-based design software, there are several small procedures, GDF for VHDL design with a digital LED display driver of the procedures, there is a three elections. 10 election procedure.
Platform: | Size: 2048 | Author: 梁兵 | Hits:

[Other] CMI

Description: 用ＭＡＸＰＬＵＳ设计的ＣＭＩ程序，好不容易弄到的，-MAXPLUS designed by CMI procedures, easy to get, and
Platform: | Size: 31744 | Author: 居然 | Hits:

[Other] qu7.1-lisence

Description: 可以破解ALTERA公司的QUATUSII 7.1 版软件.-Can crack the ALTERA company QUATUSII 7.1 software.
Platform: | Size: 6144 | Author: hewen1983 | Hits:

[Other] VHDlhdb3

Description: VHDL _HDB3编译码,基于MAXPLUS平台,有完整的仿真波形.-VHDL _HDB3 codec, based on the MAXPLUS platform, a complete simulation waveform.
Platform: | Size: 461824 | Author: 廖本友 | Hits:

[ARM-PowerPC-ColdFire-MIPS] AD0809

Description: 非常好的原代码，利用cpld控制0809采样，利用maxplus平台开发-Very good original code, the use of CPLD Control 0809 sampling, the use of platform development maxplus
Platform: | Size: 2101248 | Author: xiaoxu | Hits:

[SCM] cross_lights

Description: 本设计中选用目前应用较广泛的VHDL硬件电路描述语言，实现对路口交通灯系统的控制器的硬件电路描述，通过编译、仿真，并下载到CPLD器件上进行编程制作，实现交通灯系统的控制过程。EDA技术是用于电子产品设计中比较先进的技术，可以代替设计者完成电子系统设计中的大部分工作，而且可以直接从程序中修改错误及系统功能而不需要硬件电路的支持，既缩短了研发周期，又大大节约了成本，受到了电子工程师的青睐。实现路口交通灯系统的控制方法很多，可以用标准逻辑器件、可编程序控制器PLC、单片机等方案来实现。但是这些控制方法的功能修改及调试都需要硬件电路的支持，在一定程度上增加了功能修改及系统调试的困难。因此，在设计中采用EDA技术，应用目前广泛应用的VHDL硬件电路描述语言，实现交通灯系统控制器的设计，利用MAXPLUSⅡ集成开发环境进行综合、仿真，并下载到CPLD可编程逻辑器件中，完成系统的控制作用。-err
Platform: | Size: 4096 | Author: | Hits:

[VHDL-FPGA-Verilog] MaxplusII123

Description: MaxplusII（中文）快速入门，对学习cpld或者FPGA的有帮助-MaxplusII (Chinese) Quick Start, the CPLD or FPGA-learning has helped
Platform: | Size: 262144 | Author: 柱陈 | Hits:

[VHDL-FPGA-Verilog] naozhong

Description: 用maxplus仿真　编译通过的．数字闹钟设计，自己定时，到点报警．-Using simulation to compile maxplus adopted. Digital alarm clock design, their timing, counting alarm.
Platform: | Size: 143360 | Author: 李志伟 | Hits:

[VHDL-FPGA-Verilog] kecheng.doc00

Description: 同样是用maxplus仿真的，交通灯设计　这是我门的课程结业设计．也是ＶＨＤＬ编的-The same is maxplus simulation, traffic lights This is my design courses, the design of the door. VHDL is also a series of
Platform: | Size: 61440 | Author: 李志伟 | Hits:
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