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Description: Altera公司Quartus II软件的逻辑分析使用流程，中文版本。该文件详细说明了使用SingalTapII的流程和基本使用方法，对使用FPGA的人有很大帮助。
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Size: 1125376 |
Author: 邓奕堃 |
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Description: ALTERA 的关于对SDRAM控制器操作的verilog相关程序，很不错绝对值得借鉴。-ALTERA on the operation of the SDRAM controller Verilog procedures, it is definitely worth a good draw.
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Size: 13312 |
Author: 邹振兴 |
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Description: ALTERA关于CCD的一些verilog程序，都通过运行无误的。-ALTERA on a number of Verilog CCD procedures, both by running unmistakable.
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Size: 14336 |
Author: 邹振兴 |
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Description: altera的ip核，在sopcbuilder中添加后，在niosII IDE中可以用一条语句实现，音频解码的输出。-altera
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Size: 15360 |
Author: 朱峰 |
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Description: NIOSII的7个c语言源码，是7个例子，分别在niosII IDE环境下实现，不同的功能。是基于altera的标准c，目前资源较少。-NIOSII of 7 c language source code, is a seven examples, respectively realize niosII IDE environment, different functions. Is based on the altera standard c, currently fewer resources.
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Size: 15360 |
Author: 朱峰 |
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Description: altera的ip核，在sopcbuilder中添加后，在niosII IDE中可以轻易实现对dm9000a网卡的控制。-altera
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Size: 16384 |
Author: 朱峰 |
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Description: altera的ip核，在sopcbuilder中添加后，在niosII IDE中可以轻松控制vga的显示，十分难得哦！-altera
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Size: 23552 |
Author: 朱峰 |
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Description: altera的ip核， 添加后，在quartusII中可以轻松实现对i2c的控制，是fpga开发人员的必备工具之一。-altera
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Size: 12288 |
Author: 朱峰 |
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Description: 在Altera芯片2C35F672平台上的FFT程序，采用DSPBuilder5.0，生成Verilog文件。开发环境：QuartusII5.0。-In the Altera chip 2C35F672 platform FFT procedures DSPBuilder5.0, generated Verilog file. Development Environment: QuartusII5.0.
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Size: 474112 |
Author: lovenevol |
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Description: altera cycloneII fpga 的pcb封装图，protel格式的，下载后加载，省得自己画了。-altera cycloneII fpga the pcb package plans, protel format, download load clinics to save their own a painting.
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Size: 39936 |
Author: ln |
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Description: altera的usb下载线的制作资料，内含原理图、编程文件、文档资料等，很全的资料。-altera download of usb-line production of information, including schematics, programming files, documentation, etc., it is the whole information.
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Size: 47104 |
Author: ln |
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Description: 是关与 altera最新FPGA cyclone3的详细说明-Altera closed with the latest FPGA cyclone3 detailed description of
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Size: 2821120 |
Author: 张俊 |
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Description: quartesII 中文超详细使用教程ALTERA公司出版-Chinese quartesII use of ultra-detailed tutorials published ALTERA
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Size: 3269632 |
Author: 陈东 |
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Description: ALTERA DSPBUILDER6.0破解LICENSE
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Size: 830464 |
Author: 林虎 |
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Description: Altera原版MAXII开发板原理图（EPM1270F256C5）-Altera development board MAXII original schematic (EPM1270F256C5)
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Size: 240640 |
Author: 汪学明 |
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Description: FPGA+DA转换,ALTERA公司FPGA与DA实现,DA转换功能!-FPGA+ DA conversion, ALTERA company FPGA and DA realize, DA conversion!
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Size: 16384 |
Author: 19820521 |
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Description: 运用VHDL代码写好的RGB到YUV的颜色空间变换,整个代码已经ALTERA CYCLONE2系列FPGA上验证通过了.能正常工作.-VHDL code written to use the RGB to YUV color space conversion, the entire code ALTERA CYCLONE2 series FPGA has been tested passed. Able to work properly.
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Size: 2048 |
Author: lioushifeng |
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Description: 如何给时钟倍频或者分频，以及altera提供的IP核使用方法-How to clock multiplier or divider, as well as to provide the IP of nuclear altera use
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Size: 2048 |
Author: 杨华 |
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Description: 这个是atmel公司的产品的介绍以及选择手册，希望对大家有所帮助！-This is Atmel
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Size: 706560 |
Author: 周政 |
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Description: 本程序对如何使用altera系列芯片片上ram进行实例演示，采用Verilog HDL语言编写，并使用modelsim与quartus联合进行功能仿真。本原码是红色逻辑开发板的试验程序，值得一看。-This procedure of how to use the altera series chip-chip ram for example demonstration, using Verilog HDL language, and using ModelSim and Quartus functional simulation carried out jointly. Primitive code is red logic development board of the pilot program, worth a visit.
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Size: 180224 |
Author: panyouyu |
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