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[Other] Alter

Description: ALTERA公司附带的ALTER培训资料,比较经典权威-ALTERA Corporation incidental ALTER training materials, compare the classic authority
Platform: | Size: 20956160 | Author: 3060421006 | Hits:

[VHDL-FPGA-Verilog] PictureBrowser.tar

Description: PictureBrowser 是基于Altera 的DE2 开发板设计图像浏览器，代码是VHDL的-PictureBrowser is based on Altera
Platform: | Size: 2040832 | Author: 李斌 | Hits:

[VHDL-FPGA-Verilog] altera_avalon_lcd_controller

Description: Altera的基于NIOS II的LCD控制器源代码-Altera
Platform: | Size: 31744 | Author: 李斌 | Hits:

[Other Embeded program] altera_avalon_cy7c1380_ssram

Description: 关于altera的SRAM的读写控制IP代码，有兴趣的朋友可以下去-On the SRAM
Platform: | Size: 7168 | Author: liufanyu | Hits:

[SCM] Multi-ICE_ARM

Description: Altera USB_Blaster下载线制作资料，含图及程序
Platform: | Size: 117760 | Author: andy | Hits:

[Software Engineering] EDA_51

Description: Altera公司提供的NIOS开发板原理图，对利用NIOS实现SOC设计有参考价值-Altera provides the NIOS development board schematics, the realization of the use of NIOS reference value SOC design
Platform: | Size: 228352 | Author: wangyunshann | Hits:

[VHDL-FPGA-Verilog] diff_io_top

Description: LVDS的应用的Verilog HDL例子程序，由altera公司提供。-LVDS Application of Verilog HDL examples of procedures provided by the altera.
Platform: | Size: 527360 | Author: wangyunshann | Hits:

[VHDL-FPGA-Verilog] xulieji

Description: 在FPGA上实现序列机 用的是Altera公司的DE1板子-In the FPGA to achieve sequence machine using Altera s DE1 board
Platform: | Size: 332800 | Author: YY | Hits:

[Embeded-SCM Develop] AlterForMAX_II

Description: Altera原装MAX_II开发板原理图,是用protel绘制的-Altera development board MAX_II original schematic is drawn with Protel
Platform: | Size: 293888 | Author: 小郑 | Hits:

[Embeded-SCM Develop] FHT_example

Description: < ALTERA FPGA/CPLD 高级篇>>光盘资料中 体会“面积和速度的平衡与互换” 例程-<ALTERA FPGA/CPLD senior articles>> CD-ROM in the experience of the size and speed of balance and the exchange of routine
Platform: | Size: 229376 | Author: shicheng342 | Hits:

[Embeded-SCM Develop] DDRinterface

Description: 《ALTERA FPGA/CPLD高级篇》高速DDR存储器数据接口设计实例- ALTERA FPGA/CPLD High chapter high-speed DDR memory data interface design example
Platform: | Size: 24576 | Author: shicheng342 | Hits:

[Embeded-SCM Develop] HSDIinterface

Description: 《ALTERA FPGACPLD高级篇》高速串行差分接口（HSDI）设计实例- ALTERA FPGACPLD High chapter Differential high-speed serial interface (HSDI) design example
Platform: | Size: 290816 | Author: shicheng342 | Hits:

[Embeded-SCM Develop] LogicLock

Description: 《ALTERA FPGACPLD高级篇》LogicLock设计实例- ALTERA FPGACPLD High chapter LogicLock design example
Platform: | Size: 2541568 | Author: shicheng342 | Hits:

[VHDL-FPGA-Verilog] source

Description: SDRAM通用接口程序，和Altera所给标准一致-SDRAM generic interface procedures, and to the standards by Altera
Platform: | Size: 14336 | Author: 王并 | Hits:

[VHDL-FPGA-Verilog] i2c_p_altera

Description: altera i2c slave ip核verilog 编写-altera i2c slave ip to prepare nuclear Verilog
Platform: | Size: 1583104 | Author: 1984taozi | Hits:

[Embeded-SCM Develop] ALTERA_DE2_FSM_VHDL

Description: This an exercise in using finite state machines.基于ALTERA的DE2开发 平台，设计一个有限状态机FSM(finite state machines).-This an exercise in using finite state machines. Based on ALTERA s DE2 development platform to design a finite state machine FSM (finite state machines).
Platform: | Size: 75776 | Author: sopc | Hits:

[VHDL-FPGA-Verilog] psk

Description: 利用VHDL语言实现在，altera 公司的cyclone芯片上实现数字信号的2psk调制解调功能-The use of VHDL language to achieve, altera s cyclone chip digital signal modulation and demodulation functions 2psk
Platform: | Size: 293888 | Author: 叶峰 | Hits:

[Other] usbblaster

Description: Altera usb blaster 资料-Altera usb blaster information
Platform: | Size: 83968 | Author: 老苏 | Hits:

[VHDL-FPGA-Verilog] div

Description: 分频器是FPGA设计中使用频率非常高的基本单元之一。尽管目前在大部分设计中还广泛使用集成锁相环(如altera的PLL，Xilinx的DLL)来进行时钟的分频、倍频以及相移设计，但是，对于时钟要求不太严格的设计，通过自主设计进行时钟分频的实现方法仍然非常流行。首先这种方法可以节省锁相环资源，再者，这种方式只消耗不多的逻辑单元就可以达到对时钟操作的目的。 偶数倍分频：偶数倍分频应该是大家都比较熟悉的分频，通过计数器计数是完全可以实现的。如进行N倍偶数分频，那么可以通过由待分频的时钟触发计数器计数，当计数器从0计数到N/2-1时，输出时钟进行翻转，并给计数器一个复位信号，使得下一个时钟从零开始计数。以此循环下去。这种方法可以实现任意的偶数分频。
Platform: | Size: 2048 | Author: 王子 | Hits:

[VHDL-FPGA-Verilog] USBblaster

Description: Altera公司调试CPLD/FPGA用的USBblaster的制作文档，很详细的，已经实践过，绝对没有问题-Altera Corporation debugging CPLD/FPGA used USBblaster production of documents, in great detail, and have done so before, absolutely no problem
Platform: | Size: 2271232 | Author: Xinzhong.Ding | Hits:
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