Search - ahdl - CodeBus

[Embeded-SCM Develop] I2C

Description: i2c ipcore of altera fpga that uses ahdl lauguage.
Platform: | Size: 7168 | Author: linjack | Hits:

[VHDL-FPGA-Verilog] colorled32

Description: 这是一个用于32位色控制的LED大屏幕的AHDL代码-This is a used 32-color large screen LED control of AHDL code
Platform: | Size: 386048 | Author: ch | Hits:

[VHDL-FPGA-Verilog] 32bits_COLOR_LED_AHDL_CODE

Description: 用於32位色控制的LED大屏幕的AHDL代碼-For 32-color large screen LED control of AHDL code
Platform: | Size: 393216 | Author: 鄧志明 | Hits:

[Windows Develop] example_AHDL

Description: 硬件描述语言AHDL设计编程源程序，包括各种不同用途的代码-AHDL hardware description language design programming source code, including a variety of different uses of the code
Platform: | Size: 494592 | Author: sky | Hits:

[SCM] acc

Description: 自己使用AHDL语言编写的24位累加器.主要使用于DDS-24bit_acc
Platform: | Size: 53248 | Author: wanghaosen | Hits:

[Industry research] fr_div

Description: DDS divider clock AHDL
Platform: | Size: 75776 | Author: MAXXAM | Hits:

[VHDL-FPGA-Verilog] SY10

Description: 本文介绍了乐曲演奏电路的设计与实现中涉及的CPLD／FPGA可编程逻辑控件,开发环境MAX+PLUSⅡ,硬件描述语言HDL以及介绍了在MAX+PLUSⅡ的EDA 软件平台上, 一种基于FPGA 的乐曲发生器的设计方法, 并给出了设计的顶层电路图和底层模块的VHDL（或AHDL）源程序。该设计的正确性已通过硬件实验得到验证。 -The musical performance circuit’s design and implement Abstract: This paper introduced CPLD／FPGA programmable logic device, development entironment MAX+PLUSⅡ,hardware description language HDL which are related to the musical performance.And this paper introduced a design based on music generator by FPGA when MAX+PLUSⅡ, a EDA software is used. And a source program of VHDL (or AHDL)of the top schematics and the bottom module is supplied. The correctness of the design had been approved through hardware experiment.
Platform: | Size: 307200 | Author: guo | Hits:

[Software Engineering] JEDtoABL

Description: abel的反编译操作方法，ABEL4系统提供了一个反编译程序，如果种种原因希望从JED烧录文件获得可以编辑修改的AHDL文件，则可以通过下面的操作获得-the method of abel anti_compilation
Platform: | Size: 4096 | Author: 孙天奇 | Hits:

[Other] UART_VHDL

Description: 由于微电子学和计算机科学的迅速发展，给EDA(电子设计自动化)行业带来了巨大的变化。特别是进入20世纪90年代后，电子系统已经从电路板级系统集成发展成为包括ASIC、FPGA/CPLD和嵌入系统的多种模式。可以说EDA产业已经成为电子信息类产品的支柱产业。EDA之所以能蓬勃发展的关键因素之一就是采用了硬件描述语言(HDL)描述电路系统。就FPGA和CPLD开发而言，比较流行的HDL主要有Verilog HDL、VHDL、ABEL-HDL和 AHDL 等，其中VHDL和Verilog HDL因适合标准化的发展方向而最终成为IEEE标准。-As the microelectronics and the rapid development of computer science, to the EDA (electronic design automation) industry, has brought great changes. Especially the beginning of the 20th century, 90 years, the electronic system has moved from the circuit board-level systems integration to develop into, including ASIC, FPGA/CPLD and embedded systems a variety of modes. Can be said that EDA industry, electronic information products has become a pillar industry. EDA has been able to flourish, one of the key factors is the use of a hardware description language (HDL) description of the electronic circuitry. On the FPGA and CPLD development, the more popular HDL mainly Verilog HDL, VHDL, ABEL-HDL, and AHDL etc., in which VHDL and Verilog HDL because of the direction for the development of standardization eventually become IEEE standard.
Platform: | Size: 290816 | Author: lilei | Hits:

[Other] vhdl_ahdl_ebook

Description: vhdl語法及ahdl的語法的介紹,用於初學者入門學習-vhdl_ahdl syntax description
Platform: | Size: 5566464 | Author: yp751 | Hits:

[VHDL-FPGA-Verilog] CHICAGO5Manual

Description: 高科技的发展使芯片设计不再是半导体工业的领域，现场可编程逻辑阵列（FPGA）的出现使通过软件来快速实现芯片设计成为可能。本系统是广泛面向全球的工程技术人员和大专院校学生，使您能够在最短的时间内掌握FPGA的应用与VHDL/AHDL/Verilog HDL这一电子逻辑设计利器，迅速的加入高级电子设计人才行列。-The development of high-tech chip design is no longer the field of semiconductor industry, field programmable logic arrays (FPGA) through the emergence of chip design software to quickly achieve the possible. This system is a broad global engineering and technical personnel and college students, so that you can in the shortest possible period of time to master the application of FPGA and VHDL/AHDL/Verilog HDL logic design of the electronic weapon, quickly adding advanced electronic design talent ranks.
Platform: | Size: 258048 | Author: 童志通 | Hits:

[Other] VHDL_shuzhizhong

Description: 在学习使用仿真软件的基础上，掌握Verilog HDL或AHDL软件编程方法，设计不同类型的控制器；然后在硬件设备仿真器上下载、联调，对电路进行功能测试与验证；达到指标要求和功能实现，并将结果在仿真器上演示。-In learning to use simulation software, based on the Verilog HDL or AHDL to master the software programming and design of different types of controller then in the hardware emulator download, FBI, the circuit functional testing and verification requirements and capabilities for achieving the targets implementation, and the results demonstrate in the emulator.
Platform: | Size: 1687552 | Author: 余光学 | Hits:

[Software Engineering] liyamin_slides

Description: 基于MIPS的运算器设计，内附详细设计文档，包含设计文档和使用手册，主程序，测试程序，还有设计的框图等。实现了可以执行基本的MIPS有关运算器相关的指令共17条，用AHDL编写。-Composition Principle big operation- based on the MIPS computing design, containing a detailed design document, including design documentation and user manual, the main program, testing procedures, as well as the design of the diagram and so on. Can be implemented to achieve a basic computing device on the MIPS instruction were related to 17, prepared using Verilog.-liyamin s ppt
Platform: | Size: 8141824 | Author: 马嘉元 | Hits:

[VHDL-FPGA-Verilog] pld_encod11

Description: AHDL增量式光电码盘四倍细分后，自动计数转换成绝对数据-AHDL incremental photoelectric encoder segments four times, the automatic counting data into absolute
Platform: | Size: 2048 | Author: wangdekui | Hits:

[VHDL-FPGA-Verilog] ref-sqroot

Description: 求平方根的ip核，Altera提供，可以用在FPGA上，是AHDL语言写的，不开放源码-Square root of the ip seeking nuclear, Altera provides, can be used in FPGA, is written in AHDL, not open source
Platform: | Size: 39936 | Author: 张飞 | Hits:

[VHDL-FPGA-Verilog] RS232_FIR

Description: Quartus II was a development tool of CPLD / FPGA by Altera Company. Quartus II provides a fully integrated circuit structure and has nothing with the development package environment, it has all the features of digital logic design, it is including: available schematic, block diagram, VerilogHDL, AHDL and VHDL complete circuit description which save it as a design entity documents, chip (circuit) connection layout editor, LogicLock design method, the user can create and optimize the system, and then add the original system which is smaller or no effect on the performance of the follow-up module, powerful logic synthesis tool, complete The logic circuit functional simulation and timing simulation tools, Timer / Time Series Analysis and critical path analysis which can use SignalTap II embedded logic analysis tool for logical analysis-Quartus II was a development tool of CPLD/FPGA by Altera Company. Quartus II provides a fully integrated circuit structure and has nothing with the development package environment, it has all the features of digital logic design, it is including: available schematic, block diagram, VerilogHDL, AHDL and VHDL complete circuit description which save it as a design entity documents, chip (circuit) connection layout editor, LogicLock design method, the user can create and optimize the system, and then add the original system which is smaller or no effect on the performance of the follow-up module, powerful logic synthesis tool, complete The logic circuit functional simulation and timing simulation tools, Timer/Time Series Analysis and critical path analysis which can use SignalTap II embedded logic analysis tool for logical analysis
Platform: | Size: 202752 | Author: jay | Hits:

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