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[OS Develop] FIFO

Description: 一个异步的FIFO的VERILOG程序,有测试程序-An asynchronous FIFO in Verilog procedures, test procedures have
Platform: | Size: 4096 | Author: 陈强 | Hits:

[Linux-Unix] root-ipc-fifo-examples.tar

Description: UNIX/Linux环境下使用有名管道(FIFO)的例子。-UNIX/Linux environment using well-known pipe (FIFO) example.
Platform: | Size: 1024 | Author: root | Hits:

[OS Develop] FIFO

Description: fifo.v verilog实现的先进先出存储器-fifo.vverilog realize the FIFO memory
Platform: | Size: 2048 | Author: patrick | Hits:

[OS Develop] fifo

Description: C++写的操作系统原理及实现,模拟页面置换算法FIFO的源码-C++ Write the operating system and realize the principle of simulated FIFO page replacement algorithm for the source
Platform: | Size: 226304 | Author: woaic | Hits:

[VHDL-FPGA-Verilog] fifo

Description: 使用VHDL编程的异步FIFO程序 经调试可运行-Using VHDL programming asynchronous FIFO procedure can be run by the debugger
Platform: | Size: 131072 | Author: 张星 | Hits:

[VHDL-FPGA-Verilog] fifo

Description: 用双端口ram实现异步fifo，采用格雷码，避免产生毛刺。-Using dual-port ram realize asynchronous fifo, the use of Gray code, avoiding the production of burr.
Platform: | Size: 1024 | Author: shili | Hits:

[VHDL-FPGA-Verilog] FIFO

Description: 用VHDL语言编写的实现FIFO的设计，经编译下载成功-VHDL language used to achieve FIFO design, by the compiler download success
Platform: | Size: 66560 | Author: henry | Hits:

[OS Develop] fifo

Description: ＯＰＮＥＴ下的ＦＩＦＯ程序,用以增强ＯＰＮＥＴ下的ＦＩＦＯ功能-OPNET under the FIFO procedure to enhance the OPNET functions under the FIFO
Platform: | Size: 83968 | Author: 许光宁 | Hits:

[VHDL-FPGA-Verilog] FIFO

Description: 异步FIFO的实现，可综合，可验证] keywords:almost_full,full,almost_empty,empty-The realization of asynchronous FIFO can be comprehensive, verifiable] keywords: almost_full, full, almost_empty, empty
Platform: | Size: 1024 | Author: ly | Hits:

[Other] FIFO

Description: 大学生计算机操作系统课程设计，实现页面置换，利用fifo（先进先出）算法-Students of computer operating systems curriculum design, the realization of the page replacement, the use of fifo (FIFO) algorithm
Platform: | Size: 284672 | Author: 王明 | Hits:

[Other] fifo

Description: 一个FIFO的页面置换算法，使用java实现-A FIFO page replacement algorithm, the use of java to achieve
Platform: | Size: 3072 | Author: stephenzou | Hits:

[OS Develop] FIFO

Description: 通用异步FIFO设计的verilog代码，来自于opencore-Universal Asynchronous FIFO Verilog design code, from opencore
Platform: | Size: 18432 | Author: zhangjing | Hits:

[VHDL-FPGA-Verilog] fifo

Description: 此程序为存储器常用的FIFO（先入先出），程序中没有指明位宽，这样更适合于初学者进行套用-This process commonly used for the memory FIFO (FIFO), the procedure is not specified bit, so more suitable for beginners to apply
Platform: | Size: 1024 | Author: zhaohongliang | Hits:

[Other] fifo

Description: 一个FIFO设计的例子，例子简单，但很经典。 是学好数字设计的好开端。-A FIFO design examples, example of simple, but very classic. Learn digital design is a good start.
Platform: | Size: 1024 | Author: Benson | Hits:

[OS Develop] fifo

Description: 利用一个SAM设计一个FIFO 的存储器-SAM uses a design of a FIFO memory
Platform: | Size: 9216 | Author: lzc | Hits:

[Windows Develop] fifo

Description: 一个FIFO先入先出BUFFER的C程序。用户可以设置BUFFER大小，并通过write_fifo()和read_fifo()函数分别写入和读出数据-A FIFO FIFO BUFFER of C procedures. Users can set the BUFFER size, and through write_fifo () and read_fifo () function, respectively, and write读出数据
Platform: | Size: 1024 | Author: 韓建棟 | Hits:

[OS Develop] fifo

Description: 操作系统调度方法中的先进先出页面置换算法-Operating system scheduling methods FIFO page replacement algorithm
Platform: | Size: 3072 | Author: xun | Hits:

[VHDL-FPGA-Verilog] FIFO

Description: 用VERILOG写的FIFO程序，可以直接引用经本人测试-VERILOG written using FIFO procedures, can be directly invoked by the I test
Platform: | Size: 1125376 | Author: 李俭 | Hits:

[VHDL-FPGA-Verilog] Fifo

Description: 一个FIFO源代码，基于Altera FPGA-A FIFO source code, based on Altera FPGA
Platform: | Size: 1024 | Author: jiashengwen | Hits:

[VHDL-FPGA-Verilog] FIFO

Description: 一个用VHDL源码编写的先进先出(FIFO)缓冲器模块.可以进行FIFO的仿真验证-A source prepared by VHDL FIFO (FIFO) buffer module. Can verify FIFO simulation
Platform: | Size: 2048 | Author: falcon_cq | Hits:
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