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Description: arm spi寄存器的使用方法实例,各种初始化寄存器使用方法等-arm spi register to use examples
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Size: 81920 |
Author: felix |
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Description: AHB总线到wishbone总线的转化的Verilog源码-AHB to wishbone verilog source code
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Size: 10640384 |
Author: rex |
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Description: SOC ARM AMBA AHB-Lite 多层总线设计 PX310-P310 platform
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Size: 7360512 |
Author: Lifang |
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Description: Verilog DLL sOURCE CODE
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Size: 7709696 |
Author: jc |
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Description: USB驱动代码,-C--源码,很有参考价值。值得学习-USB DRIVE
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Size: 89088 |
Author: 木子 |
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Description: ahb master for single state representation code
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Size: 1024 |
Author: Leela |
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Description: This example shows how to configure the SysTick to generate a time base equal to
1 ms. The system clock is set to 72 MHz, the SysTick is clocked by the AHB clock
(HCLK).
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Size: 32768 |
Author: 袁松 |
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Description: This is multilayer view of amba ahb
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Size: 71680 |
Author: tamveso |
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Description: AHB SPECIFICATION SPECIFICATION SPECIFICATION SPECIFICATION-AHB SPEC YOU KNOW IT THAT IS RIGHT, SPECIFICATION SPECIFICATION SPECIFICATION SPECIFICATION SPECIFICATION
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Size: 963584 |
Author: 杨磊 |
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Description: AMBA Application Note: AN119 - AHB masters and slaves design for Virtex 2 Logic Tile.
-AMBA Application Note: AN119- AHB masters and slaves design for Virtex 2 Logic Tile.
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Size: 4566016 |
Author: 余曉民 |
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Description: AMBA Application Note: AN123 - Logic Tile IT1 GPIO example design.
-Application note AN123 provides all of the AHB slave features of AN119 with the addition of five 32bit AHB GPIO slaves. The GPIO interfaces are used to configure and test an IT1 board.
The following board combinations are supported:
Core Module+ Integrator/IM-LT1+ LT-XC2V6000+ IT1
Core Module+ Integrator/IM-LT1+ LT-XC2V8000+ IT1
Integrator/CP+ Core Module+ Integrator/IM-LT1+ LT-XC2V6000+ IT1
Integrator/CP+ Core Module+ Integrator/IM-LT1+ LT-XC2V8000+ IT1
PB926EJ-S+ LT-XC2V6000+ IT1
PB926EJ-S+ LT-XC2V8000+ IT1
Asynchronous and Synchronous bridge modes are supported on the PB926EJ-S with different design images. Asynchronous mode is selected using SW1[3] on the PB926EJ-S.
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Size: 4482048 |
Author: 余曉民 |
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Description: AMBA Application Note: AN146 - Using EB with example AHB Logic Tile.
-AMBA Application Note: AN146- Using EB with example AHB Logic Tile.
This example shows how to use the EB baseboard with an example AHB Logic Tile.
The following board combinations are supported:
Logic Tiles
LT-XC2V6000
LT-XC2V8000
LT-XC4VLX160
LT-XC4VLX200
LT-XC5VLX330
running on top of baseboards
EB+ CT7TDMI
EB+ CT926EJ-S
EB+ CT1136JF-S
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Size: 4861952 |
Author: 余曉民 |
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Description: for ahb with apb using leon
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Size: 18432 |
Author: a |
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Description: code regarding the ahb
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Size: 11264 |
Author: a |
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Description: 倍频算法实现了AHB-to-APB桥接器-An ahb2apb bridge with doubling algorithm
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Size: 4096 |
Author: 韩苗菲 |
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Description: 关于千兆以太网的硕士论文,一边的mac层,一边是ahb总线slave接口。写的非常好。-Master s thesis on Gigabit Ethernet, while the mac layer, one side is ahb bus slave interface. Write very well.
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Size: 1324032 |
Author: einstein |
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Description: ARM AMBA Bus presentation. Describes both AHB and APB.
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Size: 4029440 |
Author: Renoy |
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Description: AXI, OCP, AHB描述。仔细的分析了AXI,OCP和AHB总线的特性已经相互之间的比较。-AXI, OCP, AHB description. Careful analysis of the AXI, OCP and AHB bus has the characteristics of mutual comparison.
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Size: 6423552 |
Author: chendewei |
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Description: ARM公司提出的总线协议AHB和APB的中文资料,可作为参考资料-ARM s proposed AHB and APB bus protocol of the Chinese data, can be used as reference
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Size: 424960 |
Author: 李菲 |
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Description: 基于ARM核的嵌入式CPU内AHB接口的实现。-CPU based on ARM core embedded within the AHB interface.
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Size: 82944 |
Author: 陈锴 |
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