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[Other] amba_ahb_spec简体.pdf

Description:
Platform: | Size: 706580 | Author: chencsw | Hits:

[Other resource] leon3-altera-ep2s60-sdr

Description: ahb sdram interface.arm cpu series,include controller
Platform: | Size: 98080 | Author: lhxmodelsim | Hits:

[Other] ahb_system_generator.tar

Description: An AHB system is made of masters slaves and interconnections. A general approach to include all possible \"muxed\" implementation of multi layered AHB systems and arbitrated AHB ones can be thought as an acyclic graph where every source node is a master, every destination node is a slave and every internal node is an arbiter there must be one and only one arc exiting a master and one or more entering a slave (single slave verus multi-slave or arbitrated slave) an arbiter can have as many input and output connections as needed. A bridge is a special node that collapses one or more slave nodes and a master node in a new \"complex\" node.
Platform: | Size: 268999 | Author: 木石 | Hits:

[Other resource] CorePCIF_AHB_hb

Description: AHB to PCI Structure for FPGA/Asic Designer
Platform: | Size: 525903 | Author: 李晓媛 | Hits:

[Other resource] SLAVERAM

Description: AHB slave 的一个简单的原型程序，通过参考该程序，可以写出相应的ahb slave 代码
Platform: | Size: 1736 | Author: goodboy2716 | Hits:

[VHDL-FPGA-Verilog] Arbiter

Description: Arbiter.v verilog实现 三路请求，使用循环策略的仲裁器 含有看门狗电路-Arbiter.v Verilog achieve three road request, the use of recycled strategy for containing the arbitration watchdog circuit
Platform: | Size: 2048 | Author: 夏虫 | Hits:

[Software Engineering] ahbx

Description: 有关布线系统的一套说明，比较详细，适用于初学者。-the wiring system of a set of notes that the more detailed, applicable to beginners.
Platform: | Size: 4064256 | Author: | Hits:

[MPI] sdram_verilog_lattice

Description: 已经成功的FPGA 控制的SDRAM控制器代码.只要修改你需要的宽度就可以了.-FPGA has been successfully controlled by SDRAM controller code. As long as you need to modify the width of it.
Platform: | Size: 187392 | Author: chen qiming | Hits:

[VHDL-FPGA-Verilog] AMBAcode(vhdl)

Description: vhdl实现的amba代码-realize the AMBA VHDL code
Platform: | Size: 201728 | Author: sk | Hits:

[VHDL-FPGA-Verilog] ahbapb

Description: AMBA2.0标准的AHB2APb桥，代码通过验证-AMBA2.0 standard AHB2APb Bridge, through the verification code
Platform: | Size: 4096 | Author: LIANG | Hits:

[Other] ahb_arbiter

Description: USB v1.1 RTL and design specification
Platform: | Size: 3001344 | Author: QiangWang | Hits:

[VHDL-FPGA-Verilog] amba

Description: AMBA VHDL源代码.讲解的很详细，看看有什么可以借鉴的地方。-AMBA VHDL sourse
Platform: | Size: 35840 | Author: wusheer | Hits:

[ARM-PowerPC-ColdFire-MIPS] simulator

Description: 开源的基于SystemC的模拟器，可以模拟ARM CPU, Cache, DDR，NOR, NAND, 时序和功耗均可以正确模拟。-This simulator is a cycle-accurate system-level energy and timing simulator. Developed by Embedded Low-Power Laboratory, Seoul National University. The simulator’s underlying kernel is OSCI SystemC 2.2.0. All of the hardware modules satisfies the OSCI standards. The simulator is composed of a CPU, cache, and memory components including DDR SDRAM, MLC NOR Flash, MLC NAND Flash, SRAM. Each memory components have it’s own memory model, which enables cycle-accurate power consumption estimation of the devices. Master and slave SystemC IPs are connected through AMBA AHB CLI (Cycle-Level Interface). You will get energy trace files for each memory devices. You will get cycle-accurate performance evaluation results CPU cycle counts information, and cache hit/miss ratio on console. Also, you can get trace files for memory devices. The simulator exhibits performance over 500 K instructions/sec, which is fairly high for a cycle-accurate system-level simulator. The simulator’s source co
Platform: | Size: 4886528 | Author: Archie | Hits:

[VHDL-FPGA-Verilog] AMBA

Description: 基于AMBA总线的DDR2 SDRAM控制器研究与实现-AMBA bus-based Research and Implementation of DDR2 SDRAM Controller
Platform: | Size: 209920 | Author: guoxiaojin | Hits:

[Other] AHB

Description: 基于amba总线协议中的ahb总线的从机模块代码,需要modelsim进行测试仿真(Based on the slave bus module code of AHB bus in AMBA bus protocol, Modelsim is needed to carry out test simulation.)
Platform: | Size: 37888 | Author: 越123 | Hits:

[SourceCode] AHB SRAM

Description: ahb sram Verilog code
Platform: | Size: 253182 | Author: kashuthegreat2010@gmail.com | Hits:

[VHDL-FPGA-Verilog] dma_ahb_latest.tar

Description: AHB DMA verilog源码 AHB总线 DMA接口源码(AHB bus DMA interface source code)
Platform: | Size: 661504 | Author: 翾飞FEI | Hits:

[Other] AHB2-master

Description: verilog ahb master and slave
Platform: | Size: 31744 | Author: chandu1212 | Hits:

[Books] 01 AHB-SRAMC

Description: AHS-SRAM的实践项目讲解和PPT介绍(Introduction to Practical Projects of AHS-SRAM and PPT)
Platform: | Size: 1517568 | Author: aspirin | Hits:

[VHDL-FPGA-Verilog] AHB2-master

Description: AMBA AHB 2.0 VIP in SystemVerilog UVM
Platform: | Size: 31744 | Author: wangliu433 | Hits:
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