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[File Format] 基于VHDL与CPLD器件的FIR数字滤波器的设计 DL : 0: 这是我看到的一些资料，希望与大家分享。也许这对您用处不大，但是我的一份诚意。-this is that I see some of the information and hope to share with you all. This may be less useful to you, but my sincerity.
Date : 2025-12-19 Size : 100kb User : yin
[File Format] CPLD DL : 0: This paper presents a low-power asynchronous implementation of the 80C51 microcontroller. It was realized in a 0.5 µ m CMOS process and it shows a power advantage of a factor 4 compared to a recent synchronous implementation in the same technology. The chip is fully bit compatible with the synchronous implementation, and timing compatible for external memory access. The circuit is a compiled VLSI-program, using Tangram as VLSI-programming language and the Tangram tool set to compile the design automatically to a standard-cell netlist. This design approach proves to be powerful enough to describe the microcontroller and derive an efficient implementation. Further, it offers the designer the possibility to explore various alternatives in the design space.
Date : 2025-12-19 Size : 96kb User : 啊灿
[File Format] ByteblasterMV DL : 0: CPLD下载线缆byteblasterMV的说明文档和原理图，收集资料-CPLD download cable byteblasterMV the documentation and schematics, collect information
Date : 2025-12-19 Size : 464kb User : 肖峰
[File Format] CPLD-in-break DL : 0: CPLD在断路器在线监测数据采集系统中的应用研究-CPLD in circuit breakers online monitoring data acquisition system applied research
Date : 2025-12-19 Size : 36kb User : wangwang
[File Format] 51andCPLD DL : 0: 一个基于51系列单片机和CPLD结合完成的项目-Based on 51 Series MCU and CPLD integrated projects
Date : 2025-12-19 Size : 50kb User : bill.zhang
[File Format] 9054db-21 DL : 0: 9054芯片的datasheet，非常详细的说明了9054的用法-the data sheet of 9054，which was describe in exact detail
Date : 2025-12-19 Size : 2mb User : lin
[File Format] cpld DL : 0: 在嵌入式系统中cpld降低功耗的方法,来源：电子系统设计-method of reducing power consumption for cpld
Date : 2025-12-19 Size : 229kb User : swekey
[File Format] CPLD-XC9572-PIN-ASSIGNMENTS DL : 0: ITS and simple low power program
Date : 2025-12-19 Size : 8kb User : Navnath
[File Format] there-level DL : 0: 对三电平逆变器的SVPWM 算法的实现进行了研究，基于DSP 和CPLD 提出了两种实现方法。一种是采用数字信号处理器TMS320LF2407A 中的两个事件管理器巧妙实现了三电平SVPWM 算法-the realization of the SVPWM algorithm for three-level inverter has been studied, and two methods based on the DSP and CPLD are proposed. One method achieves skillfully the three-level SVPWM algorithm by making use of two events manager of the digital signal processor TMS320LF2407A
Date : 2025-12-19 Size : 817kb User : tao
[File Format] run DL : 0: 利用vhdl 寫出讓CPLD 跑馬燈的型式內容為:I love U-Marquee CPLD using vhdl write to the type content: I love U
Date : 2025-12-19 Size : 1kb User : Lingnien