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[Software Engineering] FPGA.CPLD DL : 0: fpga cpld 常见模块设计，包括基于fpga 的全数字锁向环，基于fpga cpld 的半整数分频器的设计等，很有用-fpga cpld common module design, including fpga-based all-digital locks to the ring, Based on the semi-fpga cpld integer divider design and useful
Date : 2008-10-13 Size : 775.56kb User : 黎莉
[Software Engineering] cpld_fpga_SW DL : 0: 里面介绍了＂CPLD，FPGA软件编程＂，里面许多许多例子，还有原代码，我也是辛苦才收集到的资料，希望能给其他工程师派上用场．-they introduced the "CPLD, FPGA software program" Inside many, many examples, the original code, I also hard to collect the information in hopes of giving the other engineers used.
Date : 2025-12-19 Size : 2.68mb User : 陈爱华
[Software Engineering] cpld_line_cnc DL : 0: 关于用CPLD和FPGA做插补算法的内容,对于想用FPGA做控制的朋友是个好的借鉴!-on with CPLD and FPGA done interpolation algorithm, for to do with the control of the FPGA is a good friend from!
Date : 2025-12-19 Size : 187kb User : 舟舟
[Software Engineering] testben DL : 0: 这是由xilin公司提供的测试文档，对于用XILINX公司的CPLD/FPGA的用户来说挺不错的。-xilin provided by the test documents, XILINX used for the CPLD/FPGA users quite well.
Date : 2025-12-19 Size : 192kb User : 苏晓利
[Software Engineering] cpldtodds DL : 0: dds信号发生器程序设计，框图，基于CPLD控制的DDS数字频率合成器设计-dds signal generator program design, block diagram, the CPLD based on DDS Digital Frequency Synthesizer Design
Date : 2025-12-19 Size : 87kb User : yaoming
[Software Engineering] verilog50% DL : 0: 本文主要介绍了50％占空比三分频器的三种设计方法，并给出了图形设计、VHDL设计、编译结果和仿真结果。设计中采用EPM7064AETC44-7 CPLD，在QUARTUSⅡ4.2软件平台上进行。 -This paper introduces a 50% duty cycle three dividers of the three design methods, and gives the graphic design, VHDL design, compile results and the simulation results. Design used EPM7064AETC44-7 CPLD. In QUARTUS II 4.2 software platform.
Date : 2025-12-19 Size : 183kb User : li
[Software Engineering] CPLdFPGAel DL : 0: CPLD、FPGA在EL显示模块及接口电路中的应用,cpld实现数字电路取代，fpga取代液晶显示专用控制芯片。-CPLD, FPGA in EL Display Module interface circuit and the application Digital Circuit cpld replaced fpga replace LCD exclusive control chip.
Date : 2025-12-19 Size : 25kb User : 苏航
[Software Engineering] RF_SOURCE DL : 0: 此射频合成信号源的设计，基于DDS芯片AD9954 和CPLD，此设计论文对设计方案有详细介绍-Synthesis of this RF signal source design, based on the DDS chip AD9954 and CPLD, Design of this thesis is the design plan detailed
Date : 2025-12-19 Size : 948kb User : 王勇军
[Software Engineering] FPGA.CPLD DL : 0: fpga cpld 常见模块设计，包括基于fpga 的全数字锁向环，基于fpga cpld 的半整数分频器的设计等，很有用-fpga cpld common module design, including fpga-based all-digital locks to the ring, Based on the semi-fpga cpld integer divider design and useful
Date : 2025-12-19 Size : 775kb User : 黎莉
[Software Engineering] cpldfpga DL : 0: 详细描述了在FPGA/CPLD设计过程中应注意的地方,和如何提高设计效率,对FPGA设计者有很好的帮助-detailed description of the FPGA/CPLD design process should be noted, and how to improve design efficiency and FPGA designers to have a good help
Date : 2025-12-19 Size : 96kb User : qutao88
[Software Engineering] CPLD_GPS_C_A DL : 0: 摘要本文介绍了一种用CPLD设计GPS数字通道相关器中C／A码产生嚣的方法，详细分析了设计原理并给出了相应的仿真结果．这种设计方法已在我们研制的GPS，GLONASS兼容机中得到实际应用。-Abstract This paper introduces a design using CPLD digital channel GPS correlator in the C/A code generated noise approach, a detailed analysis of design principles and the corresponding simulation results. This design method has been developed in our GPS, GLONASS compatible in practical application.
Date : 2025-12-19 Size : 279kb User : xiaozhu
[Software Engineering] keyscan DL : 1: 4×4键盘扫描的verilog 代码,在CPLD板上实现-4 × 4 keyboard scan Verilog code, the CPLD on the board realize
Date : 2025-12-19 Size : 1kb User : fang zhou
[Software Engineering] CPLDdesign DL : 0: 文中给出了使用cpld设计数字系统的完全过程,希望对初学者有所帮助-In this paper, the use of CPLD design of the complete process of digital systems, and they hope to be helpful for beginners
Date : 2025-12-19 Size : 294kb User :
[Software Engineering] DesignofanMP3PortablePlayerUsingaCoolRunnerCPLD.ra DL : 0: 描述了用CoolRunner CPLD实现mp3 player的一种方法，值得学习-Describes the CoolRunner CPLD with mp3 player realize a method, it is worth learning
Date : 2025-12-19 Size : 220kb User : 黄强暴
[Software Engineering] 000011111 DL : 0: 介绍了外置式USB无损图像采集卡的设计和实现方案，它用于特殊场合的图像处理及其相关领域。针对图像传输的特点，结合FPGA/CPLD和USB技术，给出了硬件实现框图，同时给出了FPGA/CPLD内部时序控制图和USB程序流程图，结合框图和部分程序源代码，具体讲述了课题中遇到的难点和相应的解决方案。 -External USB introduce a non-destructive image acquisition card design and implementation of the program, and it is used for special occasions image processing and its related fields. For image transmission characteristics, combined with FPGA/CPLD and USB technology, hardware implementation block diagram is given, at the same time gives the FPGA/CPLD Internal Timing Control charts and USB program flowchart, diagram, and some combination of source code, specifically about the topic Difficulties encountered and the corresponding solutions.
Date : 2025-12-19 Size : 137kb User : 兰升
[Software Engineering] IIC-CPLD DL : 0: iic总线协议～IIC总线通讯接口器件的CPLD实现，网上下载的资料～～很不错-IIC bus protocol ~ IIC bus communication interface device CPLD realization of downloading the information ~ ~ very good
Date : 2025-12-19 Size : 8kb User : allen
[Software Engineering] colour-LED-CPLD DL : 0: 一个基于CPLD的彩灯控制器，设计原理及部分代码-CPLD-based Lantern controller, design principles and some of the code
Date : 2025-12-19 Size : 217kb User : jackk
[Software Engineering] CPLD-safe DL : 0: 基于CPLD 的电子安全系统接口电路设计-CPLD-based electronic security system interface circuit design
Date : 2025-12-19 Size : 199kb User : jackk
[Software Engineering] CPLD-FPGA DL : 0: 学习CPLD——FPGA的经过，希望对大家入门有帮助，入了门就好说了，fpga比单片机好无数倍-Learning CPLD- FPGA' s over, we want to help entry, enter the door is like saying, fpga free several times better than the SCM
Date : 2025-12-19 Size : 4.39mb User : 孙杰
[Software Engineering] CPLD-PCI-SCH DL : 0: 使cpld 设计PCI总线接口，内部包含原理图，设计参考。-PCI CPLD SCH
Date : 2025-12-19 Size : 561kb User : ban

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