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Date : 2011-02-16 Size : 3.47mb User : 20wangtong08@163.com

FPGA的学习指南,绝对经典,内容比较超值CPLD-FPGA.rar
Date : 2011-05-25 Size : 168.53kb User : changroc

详细介绍了FPGA和CPLD的初级入门内容,是很好的FPGA电子书.rar
Date : 2011-05-25 Size : 188.25kb User : changroc

介绍了利用ALTERA公司的Maxplus Ⅱ软件及ACEX芯片,基于一种用于三相电压型逆变器的优化SVPWM算法,来实现变频调速系统,该算法采纳Kohonen神经网络的优点。选择适当的调制方法和改进的算法,不但可以显著地缩短计算时间,且显著减少开关损耗。用复杂可编程逻辑器件(CPLD) 来实现这种算法非常简单合适。
Date : 2011-11-15 Size : 96.24kb User : zt209@hotmail.com

用VHDL语言在CPLD/FPGA上实现浮点运算的方法-in VHDL CPLD/FPGA achieve floating-point computation methods
Date : 2025-12-19 Size : 81kb User : wei

基于可编程逻辑器件CPLD和直接数字频率合成技术(DDS)的三相多波形函数发生器-based CPLD and direct digital frequency synthesis (DDS) over the three-phase waveforms letter Number Generator
Date : 2025-12-19 Size : 90kb User : liujl

基于计算机总线方式的,利用CPLD进行加密,具参考价值-computer-based methods, the use of encryption CPLD, the reference value
Date : 2025-12-19 Size : 89kb User : 施生

cpld下载原理图 cpld下载原理图-cpld download diagram cpld download diagram
Date : 2025-12-19 Size : 19kb User : lrx

用VHDL语言在FPGA或者CPLD上实现任意波形的产生-VHDL language used in the FPGA or CPLD on the emergence of the realization of arbitrary waveform
Date : 2025-12-19 Size : 10kb User : 鲁帆

用CPLD实现DSP与PLX9054之间的连接,可以参考-CPLD realization of DSP with the use of the connection between the PLX9054, can refer to
Date : 2025-12-19 Size : 125kb User : 熊熊

MAXplusII102crack--cpld fpga
Date : 2025-12-19 Size : 3kb User : liu huaxiang

用vhdl做得CPLD静态两位数码管扫描 显示“10”两位数码管公用段选-CPLD with VHDL done two static scan digital tube displays
Date : 2025-12-19 Size : 242kb User : 李一倬

本文通过对常规fpp方式配置电路的分析,从加快配置速度的角度提出了一种由cpld一次读取多个数据,并介绍了该方法配置电路在ICR环境中的应用。-In this paper, the conventional fpp configure circuit analysis, speed up the configuration from the angle of the speed of a first reading by the cpld multiple data, and introduced the method to configure the circuit in the ICR environment applications.
Date : 2025-12-19 Size : 245kb User : x

DL : 0
基于lattice的CPLD时钟除频的编程与设计。-Lattice-based CPLD clock divider programming and design。
Date : 2025-12-19 Size : 1kb User : 陈祥

光纤通道的8B10B编码在CPLD上的实现与验证,编码器由数据字符编码、控制字符编码核Disparity运算三个模块组成。-Fibre Channel 8B10B coding on the CPLD Implementation and verification, data characters encoded by the encoder, the control character encoding nuclear Disparity computing three modules.
Date : 2025-12-19 Size : 1.69mb User : kevin

鸿翔电子HX-5509开发板的使用手册,以及DSP到CPLD的寄存器映射组。-Hongxiang Electronics HX-5509 development board user' s manual, and DSP to the CPLD' s register map pack.
Date : 2025-12-19 Size : 2.99mb User : 苏国英

DL : 0
CPLD与电子CAD报告 VHDL中的并行语句、进程 信号、变量、顺序语句 分频器、计数器、译码器、状态机 数字钟综合设计-CPLD and VHDL electronic CAD report in parallel statement, the process signals, variables, sequential statements divider, counter, decoder, an integrated digital clock state machine design
Date : 2025-12-19 Size : 3.74mb User : 何源

CPLD学习资料,希望能够帮到大家,有问题大家多多交流,一同进步-CPLD study sources
Date : 2025-12-19 Size : 3.65mb User : bule boy
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