数字频率计实验报告 curriculum design and FPGA design to ach

Title: 数字频率计实验报告

Category:
VHDL-FPGA-Verilog
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[WORD]
File Size:
141.5kb
Update:
2008-10-13
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Uploaded by:
hustlan2001

Description: curriculum design and FPGA design to achieve a digital frequency meter, the specific design requirements are as follows : measurement frequency range : 10Hz to 100KHz precision : F/F 2% external clock system : 1024Hz Waveform Measurement : square Vp-p = 3 ~ 5 V hardware : Altera Flex10K10 five digital LED light emitting diode programming languages : Verilog HDL/VHDL

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To Search: verilog Verilog HDL vhdl Verilog LED fpga php Altera flex10k10 waveform traffic light verilog

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