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Title: devider10 Download
 Description: Realization of two frequency division and ten frequency division of clock signal,and the two are used as the two output of the system.
 Downloaders recently: [More information of uploader 苏钰洤]
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File list (Check if you may need any files): 
FilenameSizeDate
devider10\devider10.cache\wt\java_command_handlers.wdf 1167  2017-10-29

devider10\devider10.cache\wt\project.wpc 61  2017-10-29

devider10\devider10.cache\wt\synthesis.wdf 5247  2017-10-16

devider10\devider10.cache\wt\synthesis_details.wdf 100  2017-10-16

devider10\devider10.cache\wt\webtalk_pa.xml 3138  2017-10-29

devider10\devider10.cache\wt\xsim.wdf 259  2017-10-16

devider10\devider10.hw\devider10.lpr 290  2017-10-14

devider10\devider10.hw\webtalk\.xsim_webtallk.info 59  2017-10-16

devider10\devider10.hw\webtalk\labtool_webtalk.log 361  2017-10-16

devider10\devider10.hw\webtalk\usage_statistics_ext_labtool.html 2917  2017-10-16

devider10\devider10.hw\webtalk\usage_statistics_ext_labtool.xml 2483  2017-10-16

devider10\devider10.ip_user_files\README.txt 130  2017-10-14

devider10\devider10.runs\.jobs\vrs_config_1.xml 205  2017-10-16

devider10\devider10.runs\.jobs\vrs_config_2.xml 205  2017-10-16

devider10\devider10.runs\.jobs\vrs_config_3.xml 219  2017-10-16

devider10\devider10.runs\impl_1\.init_design.begin.rst 180  2017-10-16

devider10\devider10.runs\impl_1\.init_design.end.rst 0  2017-10-16

devider10\devider10.runs\impl_1\.opt_design.begin.rst 180  2017-10-16

devider10\devider10.runs\impl_1\.opt_design.end.rst 0  2017-10-16

devider10\devider10.runs\impl_1\.place_design.begin.rst 180  2017-10-16

devider10\devider10.runs\impl_1\.place_design.end.rst 0  2017-10-16

devider10\devider10.runs\impl_1\.route_design.begin.rst 180  2017-10-16

devider10\devider10.runs\impl_1\.route_design.end.rst 0  2017-10-16

devider10\devider10.runs\impl_1\.vivado.begin.rst 179  2017-10-16

devider10\devider10.runs\impl_1\.vivado.end.rst 0  2017-10-16

devider10\devider10.runs\impl_1\.Vivado_Implementation.queue.rst 0  2017-10-16

devider10\devider10.runs\impl_1\divider10.dcp 8391  2017-10-16

devider10\devider10.runs\impl_1\divider10.tcl 3687  2017-10-16

devider10\devider10.runs\impl_1\divider10.vdi 16668  2017-10-16

devider10\devider10.runs\impl_1\divider10_clock_utilization_routed.rpt 11634  2017-10-16

devider10\devider10.runs\impl_1\divider10_control_sets_placed.rpt 2894  2017-10-16

devider10\devider10.runs\impl_1\divider10_drc_opted.rpt 3697  2017-10-16

devider10\devider10.runs\impl_1\divider10_drc_routed.pb 37  2017-10-16

devider10\devider10.runs\impl_1\divider10_drc_routed.rpt 3732  2017-10-16

devider10\devider10.runs\impl_1\divider10_io_placed.rpt 82350  2017-10-16

devider10\devider10.runs\impl_1\divider10_opt.dcp 8650  2017-10-16

devider10\devider10.runs\impl_1\divider10_placed.dcp 118008  2017-10-16

devider10\devider10.runs\impl_1\divider10_power_routed.rpt 7302  2017-10-16

devider10\devider10.runs\impl_1\divider10_power_routed.rpx 6825  2017-10-16

devider10\devider10.runs\impl_1\divider10_power_summary_routed.pb 722  2017-10-16

devider10\devider10.runs\impl_1\divider10_routed.dcp 121654  2017-10-16

devider10\devider10.runs\impl_1\divider10_route_status.pb 43  2017-10-16

devider10\devider10.runs\impl_1\divider10_route_status.rpt 588  2017-10-16

devider10\devider10.runs\impl_1\divider10_timing_summary_routed.rpt 7348  2017-10-16

devider10\devider10.runs\impl_1\divider10_timing_summary_routed.rpx 4521  2017-10-16

devider10\devider10.runs\impl_1\divider10_utilization_placed.pb 231  2017-10-16

devider10\devider10.runs\impl_1\divider10_utilization_placed.rpt 8500  2017-10-16

devider10\devider10.runs\impl_1\gen_run.xml 5225  2017-10-29

devider10\devider10.runs\impl_1\htr.txt 387  2017-10-16

devider10\devider10.runs\impl_1\init_design.pb 1616  2017-10-16

devider10\devider10.runs\impl_1\ISEWrap.js 7308  2017-10-16

devider10\devider10.runs\impl_1\ISEWrap.sh 1720  2017-10-16

devider10\devider10.runs\impl_1\opt_design.pb 4761  2017-10-16

devider10\devider10.runs\impl_1\place_design.pb 13546  2017-10-16

devider10\devider10.runs\impl_1\project.wdf 3639  2017-10-16

devider10\devider10.runs\impl_1\route_design.pb 8034  2017-10-16

devider10\devider10.runs\impl_1\rundef.js 1380  2017-10-16

devider10\devider10.runs\impl_1\runme.bat 229  2017-10-16

devider10\devider10.runs\impl_1\runme.log 16744  2017-10-16

devider10\devider10.runs\impl_1\runme.sh 1231  2017-10-16

devider10\devider10.runs\impl_1\vivado.jou 665  2017-10-16

devider10\devider10.runs\impl_1\vivado.pb 149  2017-10-16

devider10\devider10.runs\synth_1\.vivado.begin.rst 179  2017-10-16

devider10\devider10.runs\synth_1\.vivado.end.rst 0  2017-10-16

devider10\devider10.runs\synth_1\.Vivado_Synthesis.queue.rst 0  2017-10-16

devider10\devider10.runs\synth_1\divider10.dcp 8350  2017-10-16

devider10\devider10.runs\synth_1\divider10.tcl 1140  2017-10-16

devider10\devider10.runs\synth_1\divider10.vds 15299  2017-10-16

devider10\devider10.runs\synth_1\divider10_utilization_synth.pb 231  2017-10-16

devider10\devider10.runs\synth_1\divider10_utilization_synth.rpt 6857  2017-10-16

devider10\devider10.runs\synth_1\gen_run.xml 1517  2017-10-29

devider10\devider10.runs\synth_1\htr.txt 379  2017-10-16

devider10\devider10.runs\synth_1\ISEWrap.js 7308  2017-10-16

devider10\devider10.runs\synth_1\ISEWrap.sh 1720  2017-10-16

devider10\devider10.runs\synth_1\project.wdf 3639  2017-10-16

devider10\devider10.runs\synth_1\rundef.js 1309  2017-10-16

devider10\devider10.runs\synth_1\runme.bat 229  2017-10-16

devider10\devider10.runs\synth_1\runme.log 15254  2017-10-16

devider10\devider10.runs\synth_1\runme.sh 1168  2017-10-16

devider10\devider10.runs\synth_1\vivado.jou 660  2017-10-16

devider10\devider10.runs\synth_1\vivado.pb 25151  2017-10-16

devider10\devider10.sim\sim_1\behav\compile.bat 321  2017-10-16

devider10\devider10.sim\sim_1\behav\compile.log 531  2017-10-16

devider10\devider10.sim\sim_1\behav\divider_tb.tcl 459  2017-10-16

devider10\devider10.sim\sim_1\behav\divider_tb_behav.wdb 11855  2017-10-16

devider10\devider10.sim\sim_1\behav\divider_tb_vlog.prj 302  2017-10-16

devider10\devider10.sim\sim_1\behav\elaborate.bat 409  2017-10-16

devider10\devider10.sim\sim_1\behav\elaborate.log 740  2017-10-16

devider10\devider10.sim\sim_1\behav\glbl.v 1470  2016-06-02

devider10\devider10.sim\sim_1\behav\simulate.bat 333  2017-10-16

devider10\devider10.sim\sim_1\behav\simulate.log 50  2017-10-16

devider10\devider10.sim\sim_1\behav\webtalk.jou 794  2017-10-16

devider10\devider10.sim\sim_1\behav\webtalk.log 863  2017-10-16

devider10\devider10.sim\sim_1\behav\webtalk_1820.backup.jou 794  2017-10-16

devider10\devider10.sim\sim_1\behav\webtalk_1820.backup.log 863  2017-10-16

devider10\devider10.sim\sim_1\behav\xelab.pb 1530  2017-10-16

devider10\devider10.sim\sim_1\behav\xsim.dir\divider_tb_behav\Compile_Options.txt 247  2017-10-16

devider10\devider10.sim\sim_1\behav\xsim.dir\divider_tb_behav\TempBreakPointFile.txt 29  2017-10-16

devider10\devider10.sim\sim_1\behav\xsim.dir\divider_tb_behav\webtalk\.xsim_webtallk.info 64  2017-10-16

devider10\devider10.sim\sim_1\behav\xsim.dir\divider_tb_behav\webtalk\usage_statistics_ext_xsim.html 3286  2017-10-16

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