Description: One effect of the breathable lamp display is that the light fades slowly and then slowly darkens the light, so the loop.
At the beginning of the design of the breathing light, you may want to LED voltage at both ends of the voltage zero to gradually increase the light to achieve this process, and then gradually reduce the voltage to zero to achieve light to off The But we have to understand the fact that the FPGA pin output voltage is only 0 and 1 of the points, we can not make the FPGA pin output voltage slowly increased. So by controlling the voltage across the LED lights to achieve the effect of breathing lights is not up to the effect.
Although we can not make the FPGA pin output voltage gradually increase or decrease, but we can control the output of its high and low time, to control the breathing light the light to the process of light, we can make the breathing light in the unit time Of the time in turn increase, so that you can form this gradually brightening e
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pwm_led
.......\design
.......\......\pwm_led.v
.......\doc
.......\...\pwm_sim.png
.......\pin.txt
.......\quartus_prj
.......\...........\db
.......\...........\..\.cmp.kpt
.......\...........\..\prev_cmp_pwm_led.qmsg
.......\...........\..\pwm_led.db_info
.......\...........\..\pwm_led.sld_design_entry.sci
.......\...........\incremental_db
.......\...........\..............\compiled_partitions
.......\...........\..............\...................\pwm_led.db_info
.......\...........\..............\README
.......\...........\output_files
.......\...........\............\Chain_1.cdf
.......\...........\............\Chain_final.cdf
.......\...........\............\pwm_led.asm.rpt
.......\...........\............\pwm_led.done
.......\...........\............\pwm_led.fit.rpt
.......\...........\............\pwm_led.fit.smsg
.......\...........\............\pwm_led.fit.summary
.......\...........\............\pwm_led.flow.rpt
.......\...........\............\pwm_led.jdi
.......\...........\............\pwm_led.map.rpt
.......\...........\............\pwm_led.map.summary
.......\...........\............\pwm_led.pin
.......\...........\............\pwm_led.sof
.......\...........\pwm_led.qpf
.......\...........\pwm_led.qsf
.......\...........\pwm_led.qsf.bak
.......\...........\pwm_led.qws
.......\sim
.......\...\aaa.cr.mti
.......\...\aaa.mpf
.......\...\tb_pwm_led.v
.......\...\vsim.wlf
.......\...\work
.......\...\....\pwm_led
.......\...\....\.......\verilog.prw
.......\...\....\.......\verilog.psm
.......\...\....\.......\_primary.dat
.......\...\....\.......\_primary.dbs
.......\...\....\.......\_primary.vhd
.......\...\....\tb_pwm_led
.......\...\....\..........\verilog.prw
.......\...\....\..........\verilog.psm
.......\...\....\..........\_primary.dat
.......\...\....\..........\_primary.dbs
.......\...\....\..........\_primary.vhd
.......\...\....\_info
.......\...\....\_temp
.......\...\....\.....\vlog3h05j7
.......\...\....\.....\vlog4qvswk
.......\...\....\.....\vlog54st9n
.......\...\....\.....\vlogb5w9k2
.......\...\....\.....\vlogffyhf4
.......\...\....\.....\vlogni2c1b
.......\...\....\.....\vlogshv1cd
.......\...\....\.....\vlogt730rx
.......\...\....\.....\vlogy4vvm1
.......\...\....\_vmake
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