FIR_1 FIR filter Verilog, has implemented six line - CodeBus

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Title: FIR_1

Category:
VHDL-FPGA-Verilog
Tags:
[VHDL] [源码]
File Size:
950byte
Update:
2008-10-13
Downloads:
1 Times
Uploaded by:
lifu227

Description: FIR filter Verilog, has implemented six lines of program design.

Downloaders recently: [More information of uploader lifu227]

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