Description: use VHDL to achieve a fir filter design requirements : 1. The smallest stop band attenuation- 30dB. 2. With fluctuating within less than 1DB. 3. With MATLIB with MAXPLUS2 joint design and simulation
- [fir.tar] - The implement of FIR Filter based on VHD
- [2345] - voice signal 800Hz 19:00 FIR low-pass fi
- [FIR_1] - FIR filter Verilog, has implemented six
- [FIR31] - Design a linear phase FIR filter (31 ban
- [MASK.VHDL] - MASK modulation VHDL simulation based on
- [FIRDATA] - FIR digital filter algorithms and FPGA
- [FPGA_FIR] - VHDL prepared by the FIR filter source f
- [VHDL_FIR] - personally think that the use of the rel
- [Frequency_counter] - VHDL write the frequency of procedures,
- [filter-vhdl-code] - filter-vhdl-code.rar for the integrity o
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