Description: Written using Verilog cordic phase identification, using 8-level hardware design of the pipeline
- [USB_I2C_MAC_FPGA_Code] - FPGA digital electronic system design an
- [Verilog(clock)] - Verilog language using an electronic bel
- [cordic] - CORDIC algorithm is used to calculate th
- [123] - Verilog是广泛应用的硬件描述语言,可以用在硬件设计流程的建模、综合和模拟等
- [cordic] - In QUARTUS environment, through the Veri
File list (Check if you may need any files):
cordic.v