Welcome![Sign In][Sign Up]
Location:
Downloads SourceCode Embeded-SCM Develop VHDL-FPGA-Verilog
Title: bingchuan2 Download
 Description: prepared and verilogHDL string conversion module, the ISE simulation software that can be integrated, is absolutely correct
 Downloaders recently: [More information of uploader sbapgyjjj]
 To Search:
  • [S2P_xapp194] - VHDL, verilog Series and conversion comp
  • [fifo_datapath] - verilog achieved, and through serial swi
  • [VerilogHDL_p2s_s2p] - In the micro-computer system, CPU and th
  • [p2s16_1] - Some time ago to see someone in the onli
  • [parell_to_serial] - The module main is completed and the str
  • [chuan2] - Prepared using verilog HDL and string co
  • [p2s] - And series converter: the input signal i
  • [par2ser] - And/or parallel series converter input,
  • [ps] - code for the transform of ps
File list (Check if you may need any files):
bingchuan2
..........\.lso
..........\bei.prj
..........\bei.stx
..........\bei.v
..........\bei.xst
..........\bing.prj
..........\bing.stx
..........\bing.v
..........\bing.xst
..........\bingchuan.prj
..........\bingchuan.stx
..........\bingchuan.v
..........\bingchuan.xst
..........\bingchuan2.ise
..........\bingchuan2.restore
..........\bingchuan2_xdb
..........\..............\tmp
..........\..............\...\ise
..........\..............\...\...\version
..........\..............\...\...\__OBJSTORE__
..........\..............\...\...\............\Autonym
..........\..............\...\...\............\common
..........\..............\...\...\............\HierarchicalDesign
..........\..............\...\...\............\..................\HDProject
..........\..............\...\...\............\..................\.........\HDProject
..........\..............\...\...\............\..................\.........\HDProject_StrTbl
..........\..............\...\...\............\..................\__stored_object_table__
..........\..............\...\...\............\ISimPlugin
..........\..............\...\...\............\..........\SignalOrdering1
..........\..............\...\...\............\..........\...............\test_isim_beh.exe
..........\..............\...\...\............\..........\...............\test_isim_beh.exe_StrTbl
..........\..............\...\...\............\PnAutoRun
..........\..............\...\...\............\.........\Scripts
..........\..............\...\...\............\.........\.......\RunOnce_tcl
..........\..............\...\...\............\.........\.......\RunOnce_tcl_StrTbl
..........\..............\...\...\............\ProjectNavigator
..........\..............\...\...\............\................\dpm_project_main
..........\..............\...\...\............\................\................\dpm_project_main
..........\..............\...\...\............\................\................\dpm_project_main_StrTbl
..........\..............\...\...\............\................\................\NameMap
..........\..............\...\...\............\................\................\NameMap_StrTbl
..........\..............\...\...\............\................\__stored_objects__
..........\..............\...\...\............\................\__stored_objects___StrTbl
..........\..............\...\...\............\................\__stored_object_table__
..........\..............\...\...\............\ProjectNavigatorGui
..........\..............\...\...\............\...................\GuiProjectData
..........\..............\...\...\............\...................\GuiProjectData_StrTbl
..........\..............\...\...\............\SrcCtrl
..........\..............\...\...\............\.......\SavedOptions
..........\..............\...\...\............\STE
..........\..............\...\...\............\_ProjRepoInternal_
..........\..............\...\...\__REGISTRY__
..........\..............\...\...\............\Autonym
..........\..............\...\...\............\.......\regkeys
..........\..............\...\...\............\bitgen
..........\..............\...\...\............\......\regkeys
..........\..............\...\...\............\common
..........\..............\...\...\............\......\regkeys
..........\..............\...\...\............\cpldfit
..........\..............\...\...\............\.......\regkeys
..........\..............\...\...\............\dumpngdio
..........\..............\...\...\............\.........\regkeys
..........\..............\...\...\............\fuse
..........\..............\...\...\............\....\regkeys
..........\..............\...\...\............\HierarchicalDesign
..........\..............\...\...\............\..................\HDProject
..........\..............\...\...\............\..................\.........\regkeys
..........\..............\...\...\............\hprep6
..........\..............\...\...\............\......\regkeys
..........\..............\...\...\............\idem
..........\..............\...\...\.........

CodeBus www.codebus.net