Description: Design a state machine based on parallel conversion circuit of the series will be LTC1196 (ADC) output of the serial data into parallel data conversion circuit, ADC clock provided by the conversion circuit,
- [adc_verilog] - adc verilog Verilog prepared using sigma
- [SimpleSpi] - SPI interface VHDL code, which has made
- [Dac] - This is a VHDL languages used on the ext
- [shumi] - Waveform generator of the density wave,
- [ADCDAC] - ADC, DAC converter interface ~ patience
- [jisuanjizhichengkaoshi] - NCRE all titles, including the title, te
- [rens] - Wages of their own design personnel mana
- [ltc1196] - TLC1196 Serial AD control module can be
- [adc0809] - VHDL FPGA ADC0809 DAC state machine
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liuVHDL.doc
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