s2p SERDES function, the use of language VERILOG, - CodeBus

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VHDL-FPGA-Verilog

Title: s2p

Category:
VHDL-FPGA-Verilog
Tags:
[VHDL] [源码]
File Size:
1kb
Update:
2012-11-26
Downloads:
0 Times
Uploaded by:
wangdali

Description: SERDES function, the use of language VERILOG, including the test documents to share with you, for your information

Downloaders recently: [More information of uploader wangdali]

To Search: s2p SERDES serdes verilog

[IDE_2_SATA_CODE] - IDE to SATA conversion of source code, o
[bunchcombinechange] - Verilog source code, realize SERDES, lea
[parell_to_serial] - The module main is completed and the str
[parallel_to_serial] - A parallel to serial verilog source code
[74595] - SERDES simulation
[MAIN_RX_V10] - 8-Channel Video Optical Receiver side of
[serial] - Serial transfer parallel VHDL source cod
[ser_par] - 24bitAD data sampling and converted to s
[fft] - Fast Fourier Transform (FFT) of the FPGA
[vhdl_codes] - this is parallel to serial controller

File list (Check if you may need any files):

s2p
...\s2p.v
...\testbenchs2p.v

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