appnote65_quickmips_ahb_interface_design_example
................................................\docs
................................................\verilog_design
................................................\..............\Simulation_files_SilosIII
................................................\..............\.........................\ahbarb.v
................................................\..............\.........................\ahbdec.v
................................................\..............\.........................\ahbmst.v
................................................\..............\.........................\ahbslv.v
................................................\..............\.........................\ahb_def.v
................................................\..............\.........................\ahb_master.v
................................................\..............\.........................\ahb_slave.v
................................................\..............\.........................\ahb_stimuli.v
................................................\..............\.........................\appreq_sm.v
................................................\..............\.........................\app_codec.v
................................................\..............\.........................\busreq_sm.v
................................................\..............\.........................\demo_amba_for_tb.cfv
................................................\..............\.........................\demo_amba_for_tb.log
................................................\..............\.........................\demo_amba_for_tb.sim
................................................\..............\.........................\demo_amba_for_tb.spj
................................................\..............\.........................\demo_amba_for_tb.v
................................................\..............\.........................\fifo128x32.v
................................................\..............\.........................\macros.v
................................................\..............\.........................\r128a32_25um.v
................................................\..............\.........................\ram128x18_25um.v
................................................\..............\.........................\readme.txt
................................................\..............\.........................\save.hist
................................................\..............\.........................\testbench.v
................................................\..............\.........................\xor32x2.v
................................................\..............\Synthesis_and_SpDE_files
................................................\..............\........................\ahb_master.v
................................................\..............\........................\ahb_slave.v
................................................\..............\........................\appreq_sm.v
................................................\..............\........................\app_codec.v
................................................\..............\........................\busreq_sm.v
................................................\..............\........................\demo_amba.atr
................................................\..............\........................\demo_amba.chp
................................................\..............\........................\demo_amba.plg
................................................\..............\........................\demo_amba.prd
................................................\..............\........................\demo_amba.prj
................................................\..............\........................\demo_amba.qdf
................................................\..............\........................\demo_amba.rpt
..........................................