code The design of a programmable interval timer,

Title: code

Category:
VHDL-FPGA-Verilog
Tags:
[VHDL] [源码]
File Size:
6.33kb
Update:
2008-10-13
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Uploaded by:
tonysinna

Description: The design of a programmable interval timer, 8253 to complete the function, realize the following requirements: 1, contains three independent 16-bit counter, capable of three independent 16-bit count. 2, each with six counter mode. 3, can be binary/decimal subtraction count. 4, can be used for the timer or counter.

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To Search: 8253 3-opt 8253 timer 4 bit counter

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