Description: VHDL, the use of lock-in-law to achieve the synchronization algorithm, the algorithm can be simulated
- [pll] - pll.vhd : PLL written in VHDL hardware l
- [sms module] - This vc programme base on siemens TC35I
- [FPGA_27eg] - FPGA value of the 27 examples. Rar inclu
- [ps2_lcd_1602] - communication with the PS2, PS2 keys to
- [vhdlfinishcpu] - with vhdl cpu to achieve simple function
- [FFTtranslationinDSP] - FFT transform the use of a time-domain s
- [RS_FPGA] - RS coding in the FPGA to achieve the the
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