Description: Core_PWM, verilog language, can be used for motor drive
- [pwm] - VHDL-based PWM generator
- [pwm] - Using programmable logic devices that re
- [PWM] - Core_PWM, verilog language, can be used
- [newlin-pwm] - VHDL source module can realize the most
- [PWM_CT] - PWM modulation output, timing and count
- [Source] - PWM Verilog source code, can be tested t
- [VDHL] - Verilog s 135 classic design example, DC
- [PWM] - VERILOG language use PWM wave generated.
- [ADPCM] - ADPCM voice compression process has been
- [dianji] - Motor control program design, VERILOG im
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