Description: This is the sequence detector. Have a serial sequence is defined as the clock and the corresponding control signal, producing a stable single-bit output signal monitor means the corresponding clock input sequence level, monitoring the sequence of the existence of the default sequence, whether from the first few enter a start, as long as there is, always monitored. Monitoring to be marked.
- [FPGA_syn_design] - synchronous FPGA design technology, in F
- [smallgame] - Game: the source code of the chicken cat
- [Release] - Products in the software testing process
- [chk] - This procedure implements a sequence det
- [sequence_inspector] - Sequence detector can be used to detect
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