FR FPGA-based digital frequency meter design, meas - CodeBus

Welcome！[Sign In] ！[Sign Up]！

Front-page it | Collect it | [中国-简体中文]

FAQ Fav

Location:

Title: FR

Category:
VHDL-FPGA-Verilog
Tags:
[Text]
File Size:
1.14kb
Update:
2008-10-13
Downloads:
0 Times
Uploaded by:
pengde_box

Description: FPGA-based digital frequency meter design, measurable from 1Hz to 10000hz, error within 1Hz, EDA is a good example of the curriculum.

Downloaders recently: [More information of uploader pengde_box]

To Search: FPGA-based digital frequency meter

[FPGA-baseddirectdigitalsynthesisdesign.Rar] - a use FLEX10-chip RAM resources, in acco
[DigitalExperimentreport.Rar] - curriculum design and FPGA design to ach
[1111078805] - examples of the use of VHDL, including m
[Frequency_counter] - VHDL write the frequency of procedures,
[pinlvji] - FPGA-based digital frequency meter super
[DDSforsinandcos] - using VHDL DDS, output sine, cosine wave

File list (Check if you may need any files):

CodeBus www.codebus.net

“CodeBus” is the largest source code store in internet!

1999-2018 CodeBus All Rights Reserved.