traffic Xilinx completed in a simulated lights at

Title: traffic

Category:
VHDL-FPGA-Verilog
Tags:
[VHDL] [源码]
File Size:
92.64kb
Update:
2008-10-13
Downloads:
0 Times
Uploaded by:
sunnyshm

Description: Xilinx completed in a simulated traffic lights at a crossroads, a main road on the green time for the 30s, branch roads green time for 30s, and red traffic lights from green when 6s yellow light time interval. Of course, each state s countdown time value should be shown on the LED digital tube.

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