In this case the FPGA using VHDL language to achieve UART' s control, including the baud rate generator, receiver, transmitter, parity modules, and filtering module and test module that allows you a more thorough understanding of the working principle of UART .

基于FPGA的UART控制器源码\uart\uart程序说明.txt
........................\....\VHDLoo\uart_test\baud_rate.vhd
........................\....\......\.........\cmp_state.ini
........................\....\......\.........\CNT256.bsf
........................\....\......\.........\CNT256.vhd
........................\....\......\.........\fifo1.vhd
........................\....\......\.........\filter.vhd
........................\....\......\.........\parity_verifier.vhd
........................\....\......\.........\receiver.vhd
........................\....\......\.........\sinva.bsf
........................\....\......\.........\sinva.cmp
........................\....\......\.........\sinva.inc
........................\....\......\.........\sinva.vhd
........................\....\......\.........\transmitter.vhd
........................\....\......\.........\uart_ctrl.vhd
........................\....\......\.........\uart_package.vhd
........................\....\......\.........\uart_test.asm.rpt
........................\....\......\.........\uart_test.bsf
........................\....\......\.........\uart_test.cdf
........................\....\......\.........\uart_test.done
........................\....\......\.........\uart_test.fit.eqn
........................\....\......\.........\uart_test.fit.rpt
........................\....\......\.........\uart_test.fit.summary
........................\....\......\.........\uart_test.flow.rpt
........................\....\......\.........\uart_test.map.eqn
........................\....\......\.........\uart_test.map.rpt
........................\....\......\.........\uart_test.map.summary
........................\....\......\.........\uart_test.mif
........................\....\......\.........\uart_test.pin
........................\....\......\.........\uart_test.pof
........................\....\......\.........\uart_test.qpf
........................\....\......\.........\uart_test.qsf
........................\....\......\.........\uart_test.qws
........................\....\......\.........\uart_test.sof
........................\....\......\.........\uart_test.tan.rpt
........................\....\......\.........\uart_test.tan.summary
........................\....\......\.........\uart_testb.bdf
........................\....\......\.........\uart_testb.flow.rpt
........................\....\......\.........\uart_testb.map.rpt
........................\....\......\.........\uart_testb.map.summary
........................\....\......\.........\uart_testb.qpf
........................\....\......\.........\uart_testb.qsf
........................\....\......\.........\uart_testb.qws
........................\....\......\.........\uart_test_package.vhd
........................\....\......\.........\uart_test.vhd
........................\....\......\.........\db\altsyncram_cas.tdf
........................\....\......\.........\..\altsyncram_m0a2.tdf
........................\....\......\.........\..\altsyncram_vf31.tdf
........................\....\......\.........\..\a_dpfifo_3rr.tdf
........................\....\......\.........\..\cntr_bc7.tdf
........................\....\......\.........\..\cntr_sd8.tdf
........................\....\......\.........\..\cntr_td8.tdf
........................\....\......\.........\..\decode_9ie.tdf
........................\....\......\.........\..\scfifo_skr.tdf
........................\....\......\.........\..\uart_test.map.qmsg
........................\....\......\.........\..\uart_testb.db_info
........................\....\......\.........\..\uart_test.eco.cdb
........................\....\......\.........\..\uart_test.hif
........................\....\......\.........\..\uart_testb.map.qmsg
........................\....\......\.........\..\uart_testb.eco.cdb
........................\....\......\.........\..\uart_testb.sld_design_entry_dsc.sci
........................\....\......\.........\..\uart_testb.cbx.xml
........................\....\......\.........\..\uart_testb.hif
........................\....\......\.........\..\uart_testb.map.hdb
.....

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